From: Marc Zyngier <maz@kernel.org>
To: Alexander Graf <graf@amazon.com>
Cc: kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Robin Murphy <robin.murphy@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Eric Auger <eric.auger@redhat.com>,
Andrew Jones <drjones@redhat.com>
Subject: Re: [PATCH v3] KVM: arm64: Preserve PMCR immutable values across reset
Date: Tue, 29 Sep 2020 14:52:12 +0100 [thread overview]
Message-ID: <4f33899554e54e3c4485612394898864@kernel.org> (raw)
In-Reply-To: <20200910164243.29253-1-graf@amazon.com>
On 2020-09-10 17:42, Alexander Graf wrote:
> We allow user space to set the PMCR register to any value. However,
> when time comes for a vcpu reset (for example on PSCI online), PMCR
> is reset to the hardware capabilities.
>
> I would like to explicitly expose different PMU capabilities (number
> of supported event counters) to the guest than hardware supports.
> Ideally across vcpu resets.
>
> So this patch adopts the reset path to only populate the immutable
> PMCR register bits from hardware when they were not initialized
> previously. This effectively means that on a normal reset, only the
> guest settable fields are reset, while on vcpu creation the register
> gets populated from hardware like before.
>
> With this in place and a change in user space to invoke SET_ONE_REG
> on the PMCR for every vcpu, I can reliably set the PMU event counter
> number to arbitrary values.
>
> Signed-off-by: Alexander Graf <graf@amazon.com>
> ---
> arch/arm64/kvm/sys_regs.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 20ab2a7d37ca..28f67550db7f 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -663,7 +663,14 @@ static void reset_pmcr(struct kvm_vcpu *vcpu,
> const struct sys_reg_desc *r)
> {
> u64 pmcr, val;
>
> - pmcr = read_sysreg(pmcr_el0);
> + /*
> + * If we already received PMCR from a previous ONE_REG call,
> + * maintain its immutable flags
> + */
> + pmcr = __vcpu_sys_reg(vcpu, r->reg);
> + if (!__vcpu_sys_reg(vcpu, r->reg))
> + pmcr = read_sysreg(pmcr_el0);
> +
> /*
> * Writable bits of PMCR_EL0 (ARMV8_PMU_PMCR_MASK) are reset to
> UNKNOWN
> * except PMCR.E resetting to zero.
I'm afraid you may need a bit more than just this hack. At the moment,
although we can write junk into the shadow copy of PMCR_EL0, the reset
will make that behave correctly. With this patch, the junk sticks and
gets exposed to the guest.
You need at least a .set_user callback to the handling of PMCR_EL0
so that the value stored is legal, follows the architectural
behaviour, and matches the host capabilities.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
prev parent reply other threads:[~2020-09-29 13:52 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-10 16:42 [PATCH v3] KVM: arm64: Preserve PMCR immutable values across reset Alexander Graf
2020-09-10 17:36 ` Andrew Jones
2020-09-11 7:40 ` Alexander Graf
2020-09-11 8:05 ` Andrew Jones
2020-09-11 8:06 ` Andrew Jones
2020-09-29 13:52 ` Marc Zyngier [this message]
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