From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wen Congyang Subject: Re: [RFC PATCH v3 19/19][SeaBIOS] Calculate pcimem_start and pcimem64_start from SRAT entries Date: Mon, 24 Sep 2012 14:51:00 +0800 Message-ID: <506002D4.4050604@cn.fujitsu.com> References: <1348226255-4226-1-git-send-email-vasilis.liaskovitis@profitbricks.com> <1348226255-4226-20-git-send-email-vasilis.liaskovitis@profitbricks.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, seabios@seabios.org, avi@redhat.com, anthony@codemonkey.ws, kevin@koconnor.net, kraxel@redhat.com, eblake@redhat.com, blauwirbel@gmail.com, gleb@redhat.com, imammedo@redhat.com To: Vasilis Liaskovitis Return-path: Received: from cn.fujitsu.com ([222.73.24.84]:63883 "EHLO song.cn.fujitsu.com" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1753156Ab2IXGpX convert rfc822-to-8bit (ORCPT ); Mon, 24 Sep 2012 02:45:23 -0400 In-Reply-To: <1348226255-4226-20-git-send-email-vasilis.liaskovitis@profitbricks.com> Sender: kvm-owner@vger.kernel.org List-ID: At 09/21/2012 07:17 PM, Vasilis Liaskovitis Wrote: > pcimem_start and pcimem64_start are adjusted from srat entries. For t= his reason, > paravirt info (NUMA SRAT entries and number of cpus) need to be read = before pci_setup. > Imho, this is an ugly code change since SRAT bios tables and number o= f > cpus have to be read earlier. But the advantage is that no new paravi= rt interface > is introduced. Suggestions to make the code change cleaner are welcom= e. >=20 > The alternative patch (will be sent as a reply to this patch) impleme= nts a > paravirt interface to read the starting values of pcimem_start and > pcimem64_start from QEMU. >=20 > Signed-off-by: Vasilis Liaskovitis > --- > src/acpi.c | 82 ++++++++++++++++++++++++++++++++++++++++-------= --------- > src/acpi.h | 3 ++ > src/pciinit.c | 6 +++- > src/post.c | 3 ++ > src/smp.c | 4 +++ > 5 files changed, 72 insertions(+), 26 deletions(-) >=20 > diff --git a/src/acpi.c b/src/acpi.c > index 1223b52..9e99aa7 100644 > --- a/src/acpi.c > +++ b/src/acpi.c > @@ -428,7 +428,10 @@ encodeLen(u8 *ssdt_ptr, int length, int bytes) > #define MEM_OFFSET_END 63 > #define MEM_OFFSET_SIZE 79 > =20 > -u64 nb_hp_memslots =3D 0; > +u64 nb_hp_memslots =3D 0, nb_numanodes; > +u64 *numa_data, *hp_memdata; > +u64 below_4g_hp_mem_size =3D 0; > +u64 above_4g_hp_mem_size =3D 0; > struct srat_memory_affinity *mem; > =20 > #define SSDT_SIGNATURE 0x54445353 // SSDT > @@ -763,17 +766,7 @@ acpi_build_srat_memory(struct srat_memory_affini= ty *numamem, > static void * > build_srat(void) > { > - int nb_numa_nodes =3D qemu_cfg_get_numa_nodes(); > - > - u64 *numadata =3D malloc_tmphigh(sizeof(u64) * (MaxCountCPUs + n= b_numa_nodes)); > - if (!numadata) { > - warn_noalloc(); > - return NULL; > - } > - > - qemu_cfg_get_numa_data(numadata, MaxCountCPUs + nb_numa_nodes); > - > - qemu_cfg_get_numa_data(&nb_hp_memslots, 1); > + int nb_numa_nodes =3D nb_numanodes; > struct system_resource_affinity_table *srat; > int srat_size =3D sizeof(*srat) + > sizeof(struct srat_processor_affinity) * MaxCountCPUs + > @@ -782,7 +775,7 @@ build_srat(void) > srat =3D malloc_high(srat_size); > if (!srat) { > warn_noalloc(); > - free(numadata); > + free(numa_data); > return NULL; > } > =20 > @@ -791,6 +784,7 @@ build_srat(void) > struct srat_processor_affinity *core =3D (void*)(srat + 1); > int i; > u64 curnode; > + u64 *numadata =3D numa_data; > =20 > for (i =3D 0; i < MaxCountCPUs; ++i) { > core->type =3D SRAT_PROCESSOR; > @@ -847,15 +841,7 @@ build_srat(void) > mem =3D (void*)numamem; > =20 > if (nb_hp_memslots) { > - u64 *hpmemdata =3D malloc_tmphigh(sizeof(u64) * (3 * nb_hp_m= emslots)); > - if (!hpmemdata) { > - warn_noalloc(); > - free(hpmemdata); > - free(numadata); > - return NULL; > - } > - > - qemu_cfg_get_numa_data(hpmemdata, 3 * nb_hp_memslots); > + u64 *hpmemdata =3D hp_memdata; > =20 > for (i =3D 1; i < nb_hp_memslots + 1; ++i) { > mem_base =3D *hpmemdata++; > @@ -865,7 +851,7 @@ build_srat(void) > numamem++; > slots++; > } > - free(hpmemdata); > + free(hp_memdata); > } > =20 > for (; slots < nb_numa_nodes + nb_hp_memslots + 2; slots++) { > @@ -875,10 +861,58 @@ build_srat(void) > =20 > build_header((void*)srat, SRAT_SIGNATURE, srat_size, 1); > =20 > - free(numadata); > + free(numa_data); > return srat; > } > =20 > +/* QEMU paravirt SRAT entries need to be read in before pci initiliz= ation */ > +void read_srat_early(void) > +{ > + int i; > + > + nb_numanodes =3D qemu_cfg_get_numa_nodes(); > + u64 *hpmemdata; > + u64 mem_len, mem_base; > + > + numa_data =3D malloc_tmphigh(sizeof(u64) * (MaxCountCPUs + nb_nu= manodes)); > + if (!numa_data) { > + warn_noalloc(); > + } > + > + qemu_cfg_get_numa_data(numa_data, MaxCountCPUs + nb_numanodes); > + qemu_cfg_get_numa_data(&nb_hp_memslots, 1); > + > + if (nb_hp_memslots) { > + hp_memdata =3D malloc_tmphigh(sizeof(u64) * (3 * nb_hp_memsl= ots)); > + if (!hp_memdata) { > + warn_noalloc(); > + free(hp_memdata); > + free(numa_data); > + } > + > + qemu_cfg_get_numa_data(hp_memdata, 3 * nb_hp_memslots); > + hpmemdata =3D hp_memdata; > + > + for (i =3D 1; i < nb_hp_memslots + 1; ++i) { > + mem_base =3D *hpmemdata++; > + mem_len =3D *hpmemdata++; > + hpmemdata++; > + if (mem_base >=3D 0x100000000LL) { > + above_4g_hp_mem_size +=3D mem_len; > + } > + /* if dimm fits before pci hole, append it normally */ > + else if (mem_base + mem_len <=3D BUILD_PCIMEM_START) { > + below_4g_hp_mem_size +=3D mem_len; > + } > + /* otherwise place it above 4GB */ > + else { > + above_4g_hp_mem_size +=3D mem_len; > + } > + } > + > + } > +} > + > static const struct pci_device_id acpi_find_tbl[] =3D { > /* PIIX4 Power Management device. */ > PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3, N= ULL), > diff --git a/src/acpi.h b/src/acpi.h > index cb21561..d29837f 100644 > --- a/src/acpi.h > +++ b/src/acpi.h > @@ -5,6 +5,9 @@ > =20 > void acpi_bios_init(void); > u32 find_resume_vector(void); > +void read_srat_early(void); > +extern u64 below_4g_hp_mem_size; > +extern u64 above_4g_hp_mem_size; > =20 > #define RSDP_SIGNATURE 0x2052545020445352LL // "RSD PTR " > =20 > diff --git a/src/pciinit.c b/src/pciinit.c > index 31115ee..c5a4b24 100644 > --- a/src/pciinit.c > +++ b/src/pciinit.c > @@ -12,6 +12,7 @@ > #include "ioport.h" // PORT_ATA1_CMD_BASE > #include "config.h" // CONFIG_* > #include "xen.h" // usingXen > +#include "acpi.h" > =20 > #define PCI_DEVICE_MEM_MIN 0x1000 > #define PCI_BRIDGE_IO_MIN 0x1000 > @@ -597,7 +598,7 @@ static void pci_region_map_entries(struct pci_bus= *busses, struct pci_region *r) > =20 > static void pci_bios_map_devices(struct pci_bus *busses) > { > - pcimem_start =3D RamSize; > + pcimem_start =3D RamSize + below_4g_hp_mem_size; > =20 > if (pci_bios_init_root_regions(busses)) { > struct pci_region r64_mem, r64_pref; > @@ -616,7 +617,8 @@ static void pci_bios_map_devices(struct pci_bus *= busses) > u64 align_mem =3D pci_region_align(&r64_mem); > u64 align_pref =3D pci_region_align(&r64_pref); > =20 > - r64_mem.base =3D ALIGN(0x100000000LL + RamSizeOver4G, align_= mem); > + r64_mem.base =3D ALIGN(0x100000000LL + RamSizeOver4G + > + above_4g_hp_mem_size, align_mem); > r64_pref.base =3D ALIGN(r64_mem.base + sum_mem, align_pref); > pcimem64_start =3D r64_mem.base; > pcimem64_end =3D r64_pref.base + sum_pref; > diff --git a/src/post.c b/src/post.c > index 924b311..c37730b 100644 > --- a/src/post.c > +++ b/src/post.c > @@ -234,6 +234,9 @@ maininit(void) > // Initialize mtrr > mtrr_setup(); > =20 > + smp_get_ncpus(); > + read_srat_early(); > + > // Initialize pci > pci_setup(); > smm_init(); > diff --git a/src/smp.c b/src/smp.c > index 4975412..3922776 100644 > --- a/src/smp.c > +++ b/src/smp.c > @@ -138,7 +138,11 @@ smp_probe(void) > =20 > // Restore memory. > *(u64*)BUILD_AP_BOOT_ADDR =3D old; > +} > =20 > +void > +smp_get_ncpus(void) You don't declare this function, and use it in another file. It will br= eak building: src/post.c: In function =91maininit=92: src/post.c:237: warning: implicit declaration of function =91smp_get_nc= pus=92 src/smp.c:144: note: previous definition of =91smp_get_ncpus=92 was her= e src/post.c:237: error: incompatible implicit declaration of function =91= smp_get_ncpus=92 src/smp.c:144: note: previous definition of =91smp_get_ncpus=92 was her= e Thanks Wen Congyang > +{ > MaxCountCPUs =3D qemu_cfg_get_max_cpus(); > if (!MaxCountCPUs || MaxCountCPUs < CountCPUs) > MaxCountCPUs =3D CountCPUs;