From mboxrd@z Thu Jan 1 00:00:00 1970 From: Glauber Costa Subject: Re: [patch 18/18] KVM: x86: update pvclock area conditionally, on cpu migration Date: Thu, 15 Nov 2012 16:34:14 +0400 Message-ID: <50A4E146.3000008@parallels.com> References: <20121115000823.285102321@redhat.com> <20121115000944.772253863@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Cc: , , , , , , To: Marcelo Tosatti Return-path: Received: from mx2.parallels.com ([64.131.90.16]:48649 "EHLO mx2.parallels.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2993283Ab2KOMeV (ORCPT ); Thu, 15 Nov 2012 07:34:21 -0500 In-Reply-To: <20121115000944.772253863@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 11/15/2012 04:08 AM, Marcelo Tosatti wrote: > As requested by Glauber, do not update kvmclock area on vcpu->pcpu > migration, in case the host has stable TSC. > > This is to reduce cacheline bouncing. > > Signed-off-by: Marcelo Tosatti This looks fine, but it can always get tricky... Assuming you tested this change in at least one stable tsc and one unstable tsc system: Acked-by: Glauber Costa