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From: "H. Peter Anvin" <hpa@zytor.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>,
	KVM list <kvm@vger.kernel.org>,
	virtualization@lists.linux-foundation.org
Subject: Re: virtio PCI on KVM without IO BARs
Date: Wed, 06 Mar 2013 03:15:16 -0800	[thread overview]
Message-ID: <51372544.7090409@zytor.com> (raw)
In-Reply-To: <20130306092140.GA16921@redhat.com>

On 03/06/2013 01:21 AM, Michael S. Tsirkin wrote:
> 
> Right. Though even with better granularify bridge windows
> would still be a (smaller) problem causing fragmentation.
> 
> If we were to extend the PCI spec I would go for a bridge without
> windows at all: a bridge can snoop on configuration transactions and
> responses programming devices behind it and build a full map of address
> to device mappings.
> 
> In partucular, this would be a good fit for an uplink bridge in a PCI
> express switch, which is integrated with downlink bridges on the same
> silicon, so bridge windows do nothing but add overhead.
> 

True, but the real problem is that the downlink (type 1 header) is
typically on a different piece of silicon than the device BAR (type 0
header).

I am not sure that a snooping-based system will work and not be
prohibitive in its hardware cost on an actual hardware system.  I
suspect it would decay into needing a large RAM array in every bridge.

	-hpa

  reply	other threads:[~2013-03-06 11:15 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-02-28 15:24 virtio PCI on KVM without IO BARs Michael S. Tsirkin
2013-02-28 15:43 ` Jan Kiszka
2013-03-04 22:01 ` Marcelo Tosatti
2013-03-06  0:05 ` H. Peter Anvin
2013-03-06  7:14   ` H. Peter Anvin
2013-03-06  9:21     ` Michael S. Tsirkin
2013-03-06 11:15       ` H. Peter Anvin [this message]
2013-03-06 12:02         ` Michael S. Tsirkin
2013-04-29 14:48 ` Don Dutile
2013-04-29 23:03   ` H. Peter Anvin

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