* Re: [PATCH] KVM: nVMX: Add preemption timer support
2013-03-13 10:31 ` [PATCH] KVM: nVMX: Add preemption timer support Jan Kiszka
@ 2013-03-13 12:46 ` Paolo Bonzini
2013-03-13 14:44 ` Gleb Natapov
2013-03-14 8:05 ` Gleb Natapov
2 siblings, 0 replies; 9+ messages in thread
From: Paolo Bonzini @ 2013-03-13 12:46 UTC (permalink / raw)
To: Jan Kiszka
Cc: Gleb Natapov, Marcelo Tosatti, kvm, Nadav Har'El,
Nakajima, Jun
Il 13/03/2013 11:31, Jan Kiszka ha scritto:
> Provided the host has this feature, it's straightforward to offer it to
> the guest as well. We just need to load to timer value on L2 entry if
> the feature was enabled by L1 and watch out for the corresponding exit
> reason.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
> arch/x86/include/asm/vmx.h | 3 +++
> arch/x86/include/uapi/asm/vmx.h | 5 +++--
> arch/x86/kvm/vmx.c | 17 ++++++++++++++---
> 3 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
> index 056bda5..fc1c313 100644
> --- a/arch/x86/include/asm/vmx.h
> +++ b/arch/x86/include/asm/vmx.h
> @@ -70,6 +70,7 @@
> #define PIN_BASED_EXT_INTR_MASK 0x00000001
> #define PIN_BASED_NMI_EXITING 0x00000008
> #define PIN_BASED_VIRTUAL_NMIS 0x00000020
> +#define PIN_BASED_VMX_PREEMPTION_TIMER 0x00000040
>
> #define PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR 0x00000016
>
> @@ -95,6 +96,7 @@
>
> #define VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR 0x000011ff
>
> +#define VMX_MISC_PREEMPTION_TIMER_RATE_MASK 0x0000001f
> #define VMX_MISC_SAVE_EFER_LMA 0x00000020
>
> /* VMCS Encodings */
> @@ -217,6 +219,7 @@ enum vmcs_field {
> GUEST_INTERRUPTIBILITY_INFO = 0x00004824,
> GUEST_ACTIVITY_STATE = 0X00004826,
> GUEST_SYSENTER_CS = 0x0000482A,
> + VMX_PREEMPTION_TIMER_VALUE = 0x0000482E,
> HOST_IA32_SYSENTER_CS = 0x00004c00,
> CR0_GUEST_HOST_MASK = 0x00006000,
> CR4_GUEST_HOST_MASK = 0x00006002,
> diff --git a/arch/x86/include/uapi/asm/vmx.h b/arch/x86/include/uapi/asm/vmx.h
> index 2871fcc..d651082 100644
> --- a/arch/x86/include/uapi/asm/vmx.h
> +++ b/arch/x86/include/uapi/asm/vmx.h
> @@ -65,6 +65,7 @@
> #define EXIT_REASON_EOI_INDUCED 45
> #define EXIT_REASON_EPT_VIOLATION 48
> #define EXIT_REASON_EPT_MISCONFIG 49
> +#define EXIT_REASON_PREEMPTION_TIMER 52
> #define EXIT_REASON_WBINVD 54
> #define EXIT_REASON_XSETBV 55
> #define EXIT_REASON_APIC_WRITE 56
> @@ -110,7 +111,7 @@
> { EXIT_REASON_EOI_INDUCED, "EOI_INDUCED" }, \
> { EXIT_REASON_INVALID_STATE, "INVALID_STATE" }, \
> { EXIT_REASON_INVD, "INVD" }, \
> - { EXIT_REASON_INVPCID, "INVPCID" }
> -
> + { EXIT_REASON_INVPCID, "INVPCID" }, \
> + { EXIT_REASON_PREEMPTION_TIMER, "PREEMPTION_TIMER" }
>
> #endif /* _UAPIVMX_H */
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 0f0cc6a..5b8eeb6 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -298,7 +298,8 @@ struct __packed vmcs12 {
> u32 guest_activity_state;
> u32 guest_sysenter_cs;
> u32 host_ia32_sysenter_cs;
> - u32 padding32[8]; /* room for future expansion */
> + u32 vmx_preemption_timer_value;
> + u32 padding32[7]; /* room for future expansion */
> u16 virtual_processor_id;
> u16 guest_es_selector;
> u16 guest_cs_selector;
> @@ -537,6 +538,7 @@ static const unsigned short vmcs_field_to_offset_table[] = {
> FIELD(GUEST_ACTIVITY_STATE, guest_activity_state),
> FIELD(GUEST_SYSENTER_CS, guest_sysenter_cs),
> FIELD(HOST_IA32_SYSENTER_CS, host_ia32_sysenter_cs),
> + FIELD(VMX_PREEMPTION_TIMER_VALUE, vmx_preemption_timer_value),
> FIELD(CR0_GUEST_HOST_MASK, cr0_guest_host_mask),
> FIELD(CR4_GUEST_HOST_MASK, cr4_guest_host_mask),
> FIELD(CR0_READ_SHADOW, cr0_read_shadow),
> @@ -2049,7 +2051,8 @@ static __init void nested_vmx_setup_ctls_msrs(void)
> */
> nested_vmx_pinbased_ctls_low |= PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR;
> nested_vmx_pinbased_ctls_high &= PIN_BASED_EXT_INTR_MASK |
> - PIN_BASED_NMI_EXITING | PIN_BASED_VIRTUAL_NMIS;
> + PIN_BASED_NMI_EXITING | PIN_BASED_VIRTUAL_NMIS |
> + PIN_BASED_VMX_PREEMPTION_TIMER;
> nested_vmx_pinbased_ctls_high |= PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR;
>
> /*
> @@ -2110,7 +2113,8 @@ static __init void nested_vmx_setup_ctls_msrs(void)
>
> /* miscellaneous data */
> rdmsr(MSR_IA32_VMX_MISC, nested_vmx_misc_low, nested_vmx_misc_high);
> - nested_vmx_misc_low &= VMX_MISC_SAVE_EFER_LMA;
> + nested_vmx_misc_low &= VMX_MISC_PREEMPTION_TIMER_RATE_MASK |
> + VMX_MISC_SAVE_EFER_LMA;
> nested_vmx_misc_high = 0;
> }
>
> @@ -6191,6 +6195,9 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
> case EXIT_REASON_EPT_VIOLATION:
> case EXIT_REASON_EPT_MISCONFIG:
> return 0;
> + case EXIT_REASON_PREEMPTION_TIMER:
> + return vmcs12->pin_based_vm_exec_control &
> + PIN_BASED_VMX_PREEMPTION_TIMER;
> case EXIT_REASON_WBINVD:
> return nested_cpu_has2(vmcs12, SECONDARY_EXEC_WBINVD_EXITING);
> case EXIT_REASON_XSETBV:
> @@ -6984,6 +6991,10 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
> (vmcs_config.pin_based_exec_ctrl |
> vmcs12->pin_based_vm_exec_control));
>
> + if (vmcs12->pin_based_vm_exec_control & PIN_BASED_VMX_PREEMPTION_TIMER)
> + vmcs_write32(VMX_PREEMPTION_TIMER_VALUE,
> + vmcs12->vmx_preemption_timer_value);
> +
> /*
> * Whether page-faults are trapped is determined by a combination of
> * 3 settings: PFEC_MASK, PFEC_MATCH and EXCEPTION_BITMAP.PF.
>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH] KVM: nVMX: Add preemption timer support
2013-03-13 10:31 ` [PATCH] KVM: nVMX: Add preemption timer support Jan Kiszka
2013-03-13 12:46 ` Paolo Bonzini
@ 2013-03-13 14:44 ` Gleb Natapov
2013-03-13 14:50 ` Jan Kiszka
2013-03-14 8:05 ` Gleb Natapov
2 siblings, 1 reply; 9+ messages in thread
From: Gleb Natapov @ 2013-03-13 14:44 UTC (permalink / raw)
To: Jan Kiszka; +Cc: Marcelo Tosatti, kvm, Nadav Har'El, Nakajima, Jun
On Wed, Mar 13, 2013 at 11:31:24AM +0100, Jan Kiszka wrote:
> Provided the host has this feature, it's straightforward to offer it to
> the guest as well. We just need to load to timer value on L2 entry if
> the feature was enabled by L1 and watch out for the corresponding exit
> reason.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
> arch/x86/include/asm/vmx.h | 3 +++
> arch/x86/include/uapi/asm/vmx.h | 5 +++--
> arch/x86/kvm/vmx.c | 17 ++++++++++++++---
> 3 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
> index 056bda5..fc1c313 100644
> --- a/arch/x86/include/asm/vmx.h
> +++ b/arch/x86/include/asm/vmx.h
> @@ -70,6 +70,7 @@
> #define PIN_BASED_EXT_INTR_MASK 0x00000001
> #define PIN_BASED_NMI_EXITING 0x00000008
> #define PIN_BASED_VIRTUAL_NMIS 0x00000020
> +#define PIN_BASED_VMX_PREEMPTION_TIMER 0x00000040
>
> #define PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR 0x00000016
>
> @@ -95,6 +96,7 @@
>
> #define VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR 0x000011ff
>
> +#define VMX_MISC_PREEMPTION_TIMER_RATE_MASK 0x0000001f
> #define VMX_MISC_SAVE_EFER_LMA 0x00000020
What is this patch against? I do not see VMX_MISC_SAVE_EFER_LMA in
kvm.git queue.
>
> /* VMCS Encodings */
> @@ -217,6 +219,7 @@ enum vmcs_field {
> GUEST_INTERRUPTIBILITY_INFO = 0x00004824,
> GUEST_ACTIVITY_STATE = 0X00004826,
> GUEST_SYSENTER_CS = 0x0000482A,
> + VMX_PREEMPTION_TIMER_VALUE = 0x0000482E,
> HOST_IA32_SYSENTER_CS = 0x00004c00,
> CR0_GUEST_HOST_MASK = 0x00006000,
> CR4_GUEST_HOST_MASK = 0x00006002,
> diff --git a/arch/x86/include/uapi/asm/vmx.h b/arch/x86/include/uapi/asm/vmx.h
> index 2871fcc..d651082 100644
> --- a/arch/x86/include/uapi/asm/vmx.h
> +++ b/arch/x86/include/uapi/asm/vmx.h
> @@ -65,6 +65,7 @@
> #define EXIT_REASON_EOI_INDUCED 45
> #define EXIT_REASON_EPT_VIOLATION 48
> #define EXIT_REASON_EPT_MISCONFIG 49
> +#define EXIT_REASON_PREEMPTION_TIMER 52
> #define EXIT_REASON_WBINVD 54
> #define EXIT_REASON_XSETBV 55
> #define EXIT_REASON_APIC_WRITE 56
> @@ -110,7 +111,7 @@
> { EXIT_REASON_EOI_INDUCED, "EOI_INDUCED" }, \
> { EXIT_REASON_INVALID_STATE, "INVALID_STATE" }, \
> { EXIT_REASON_INVD, "INVD" }, \
> - { EXIT_REASON_INVPCID, "INVPCID" }
> -
> + { EXIT_REASON_INVPCID, "INVPCID" }, \
> + { EXIT_REASON_PREEMPTION_TIMER, "PREEMPTION_TIMER" }
>
> #endif /* _UAPIVMX_H */
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 0f0cc6a..5b8eeb6 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -298,7 +298,8 @@ struct __packed vmcs12 {
> u32 guest_activity_state;
> u32 guest_sysenter_cs;
> u32 host_ia32_sysenter_cs;
> - u32 padding32[8]; /* room for future expansion */
> + u32 vmx_preemption_timer_value;
> + u32 padding32[7]; /* room for future expansion */
> u16 virtual_processor_id;
> u16 guest_es_selector;
> u16 guest_cs_selector;
> @@ -537,6 +538,7 @@ static const unsigned short vmcs_field_to_offset_table[] = {
> FIELD(GUEST_ACTIVITY_STATE, guest_activity_state),
> FIELD(GUEST_SYSENTER_CS, guest_sysenter_cs),
> FIELD(HOST_IA32_SYSENTER_CS, host_ia32_sysenter_cs),
> + FIELD(VMX_PREEMPTION_TIMER_VALUE, vmx_preemption_timer_value),
> FIELD(CR0_GUEST_HOST_MASK, cr0_guest_host_mask),
> FIELD(CR4_GUEST_HOST_MASK, cr4_guest_host_mask),
> FIELD(CR0_READ_SHADOW, cr0_read_shadow),
> @@ -2049,7 +2051,8 @@ static __init void nested_vmx_setup_ctls_msrs(void)
> */
> nested_vmx_pinbased_ctls_low |= PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR;
> nested_vmx_pinbased_ctls_high &= PIN_BASED_EXT_INTR_MASK |
> - PIN_BASED_NMI_EXITING | PIN_BASED_VIRTUAL_NMIS;
> + PIN_BASED_NMI_EXITING | PIN_BASED_VIRTUAL_NMIS |
> + PIN_BASED_VMX_PREEMPTION_TIMER;
> nested_vmx_pinbased_ctls_high |= PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR;
>
> /*
> @@ -2110,7 +2113,8 @@ static __init void nested_vmx_setup_ctls_msrs(void)
>
> /* miscellaneous data */
> rdmsr(MSR_IA32_VMX_MISC, nested_vmx_misc_low, nested_vmx_misc_high);
> - nested_vmx_misc_low &= VMX_MISC_SAVE_EFER_LMA;
> + nested_vmx_misc_low &= VMX_MISC_PREEMPTION_TIMER_RATE_MASK |
> + VMX_MISC_SAVE_EFER_LMA;
> nested_vmx_misc_high = 0;
> }
>
> @@ -6191,6 +6195,9 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
> case EXIT_REASON_EPT_VIOLATION:
> case EXIT_REASON_EPT_MISCONFIG:
> return 0;
> + case EXIT_REASON_PREEMPTION_TIMER:
> + return vmcs12->pin_based_vm_exec_control &
> + PIN_BASED_VMX_PREEMPTION_TIMER;
> case EXIT_REASON_WBINVD:
> return nested_cpu_has2(vmcs12, SECONDARY_EXEC_WBINVD_EXITING);
> case EXIT_REASON_XSETBV:
> @@ -6984,6 +6991,10 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
> (vmcs_config.pin_based_exec_ctrl |
> vmcs12->pin_based_vm_exec_control));
>
> + if (vmcs12->pin_based_vm_exec_control & PIN_BASED_VMX_PREEMPTION_TIMER)
> + vmcs_write32(VMX_PREEMPTION_TIMER_VALUE,
> + vmcs12->vmx_preemption_timer_value);
> +
> /*
> * Whether page-faults are trapped is determined by a combination of
> * 3 settings: PFEC_MASK, PFEC_MATCH and EXCEPTION_BITMAP.PF.
> --
> 1.7.3.4
--
Gleb.
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH] KVM: nVMX: Add preemption timer support
2013-03-13 14:44 ` Gleb Natapov
@ 2013-03-13 14:50 ` Jan Kiszka
2013-03-13 15:00 ` Jan Kiszka
0 siblings, 1 reply; 9+ messages in thread
From: Jan Kiszka @ 2013-03-13 14:50 UTC (permalink / raw)
To: Gleb Natapov; +Cc: Marcelo Tosatti, kvm, Nadav Har'El, Nakajima, Jun
On 2013-03-13 15:44, Gleb Natapov wrote:
> On Wed, Mar 13, 2013 at 11:31:24AM +0100, Jan Kiszka wrote:
>> Provided the host has this feature, it's straightforward to offer it to
>> the guest as well. We just need to load to timer value on L2 entry if
>> the feature was enabled by L1 and watch out for the corresponding exit
>> reason.
>>
>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
>> ---
>> arch/x86/include/asm/vmx.h | 3 +++
>> arch/x86/include/uapi/asm/vmx.h | 5 +++--
>> arch/x86/kvm/vmx.c | 17 ++++++++++++++---
>> 3 files changed, 20 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
>> index 056bda5..fc1c313 100644
>> --- a/arch/x86/include/asm/vmx.h
>> +++ b/arch/x86/include/asm/vmx.h
>> @@ -70,6 +70,7 @@
>> #define PIN_BASED_EXT_INTR_MASK 0x00000001
>> #define PIN_BASED_NMI_EXITING 0x00000008
>> #define PIN_BASED_VIRTUAL_NMIS 0x00000020
>> +#define PIN_BASED_VMX_PREEMPTION_TIMER 0x00000040
>>
>> #define PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR 0x00000016
>>
>> @@ -95,6 +96,7 @@
>>
>> #define VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR 0x000011ff
>>
>> +#define VMX_MISC_PREEMPTION_TIMER_RATE_MASK 0x0000001f
>> #define VMX_MISC_SAVE_EFER_LMA 0x00000020
> What is this patch against? I do not see VMX_MISC_SAVE_EFER_LMA in
> kvm.git queue.
Against my queue after adding support for nested EFER.LMA saving, sorry.
I thought I posted that patch already, but I didn't. Will reorder (and
send those other bits as well at that chance).
Jan
--
Siemens AG, Corporate Technology, CT RTC ITP SDP-DE
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] KVM: nVMX: Add preemption timer support
2013-03-13 14:50 ` Jan Kiszka
@ 2013-03-13 15:00 ` Jan Kiszka
0 siblings, 0 replies; 9+ messages in thread
From: Jan Kiszka @ 2013-03-13 15:00 UTC (permalink / raw)
To: Gleb Natapov; +Cc: Marcelo Tosatti, kvm, Nadav Har'El, Nakajima, Jun
On 2013-03-13 15:50, Jan Kiszka wrote:
> On 2013-03-13 15:44, Gleb Natapov wrote:
>> On Wed, Mar 13, 2013 at 11:31:24AM +0100, Jan Kiszka wrote:
>>> Provided the host has this feature, it's straightforward to offer it to
>>> the guest as well. We just need to load to timer value on L2 entry if
>>> the feature was enabled by L1 and watch out for the corresponding exit
>>> reason.
>>>
>>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
>>> ---
>>> arch/x86/include/asm/vmx.h | 3 +++
>>> arch/x86/include/uapi/asm/vmx.h | 5 +++--
>>> arch/x86/kvm/vmx.c | 17 ++++++++++++++---
>>> 3 files changed, 20 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
>>> index 056bda5..fc1c313 100644
>>> --- a/arch/x86/include/asm/vmx.h
>>> +++ b/arch/x86/include/asm/vmx.h
>>> @@ -70,6 +70,7 @@
>>> #define PIN_BASED_EXT_INTR_MASK 0x00000001
>>> #define PIN_BASED_NMI_EXITING 0x00000008
>>> #define PIN_BASED_VIRTUAL_NMIS 0x00000020
>>> +#define PIN_BASED_VMX_PREEMPTION_TIMER 0x00000040
>>>
>>> #define PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR 0x00000016
>>>
>>> @@ -95,6 +96,7 @@
>>>
>>> #define VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR 0x000011ff
>>>
>>> +#define VMX_MISC_PREEMPTION_TIMER_RATE_MASK 0x0000001f
>>> #define VMX_MISC_SAVE_EFER_LMA 0x00000020
>> What is this patch against? I do not see VMX_MISC_SAVE_EFER_LMA in
>> kvm.git queue.
>
> Against my queue after adding support for nested EFER.LMA saving, sorry.
> I thought I posted that patch already, but I didn't. Will reorder (and
> send those other bits as well at that chance).
In fact, the other way around is simpler: posting the missing patch.
Jan
--
Siemens AG, Corporate Technology, CT RTC ITP SDP-DE
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] KVM: nVMX: Add preemption timer support
2013-03-13 10:31 ` [PATCH] KVM: nVMX: Add preemption timer support Jan Kiszka
2013-03-13 12:46 ` Paolo Bonzini
2013-03-13 14:44 ` Gleb Natapov
@ 2013-03-14 8:05 ` Gleb Natapov
2 siblings, 0 replies; 9+ messages in thread
From: Gleb Natapov @ 2013-03-14 8:05 UTC (permalink / raw)
To: Jan Kiszka; +Cc: Marcelo Tosatti, kvm, Nadav Har'El, Nakajima, Jun
On Wed, Mar 13, 2013 at 11:31:24AM +0100, Jan Kiszka wrote:
> Provided the host has this feature, it's straightforward to offer it to
> the guest as well. We just need to load to timer value on L2 entry if
> the feature was enabled by L1 and watch out for the corresponding exit
> reason.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Applied, thanks
> ---
> arch/x86/include/asm/vmx.h | 3 +++
> arch/x86/include/uapi/asm/vmx.h | 5 +++--
> arch/x86/kvm/vmx.c | 17 ++++++++++++++---
> 3 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
> index 056bda5..fc1c313 100644
> --- a/arch/x86/include/asm/vmx.h
> +++ b/arch/x86/include/asm/vmx.h
> @@ -70,6 +70,7 @@
> #define PIN_BASED_EXT_INTR_MASK 0x00000001
> #define PIN_BASED_NMI_EXITING 0x00000008
> #define PIN_BASED_VIRTUAL_NMIS 0x00000020
> +#define PIN_BASED_VMX_PREEMPTION_TIMER 0x00000040
>
> #define PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR 0x00000016
>
> @@ -95,6 +96,7 @@
>
> #define VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR 0x000011ff
>
> +#define VMX_MISC_PREEMPTION_TIMER_RATE_MASK 0x0000001f
> #define VMX_MISC_SAVE_EFER_LMA 0x00000020
>
> /* VMCS Encodings */
> @@ -217,6 +219,7 @@ enum vmcs_field {
> GUEST_INTERRUPTIBILITY_INFO = 0x00004824,
> GUEST_ACTIVITY_STATE = 0X00004826,
> GUEST_SYSENTER_CS = 0x0000482A,
> + VMX_PREEMPTION_TIMER_VALUE = 0x0000482E,
> HOST_IA32_SYSENTER_CS = 0x00004c00,
> CR0_GUEST_HOST_MASK = 0x00006000,
> CR4_GUEST_HOST_MASK = 0x00006002,
> diff --git a/arch/x86/include/uapi/asm/vmx.h b/arch/x86/include/uapi/asm/vmx.h
> index 2871fcc..d651082 100644
> --- a/arch/x86/include/uapi/asm/vmx.h
> +++ b/arch/x86/include/uapi/asm/vmx.h
> @@ -65,6 +65,7 @@
> #define EXIT_REASON_EOI_INDUCED 45
> #define EXIT_REASON_EPT_VIOLATION 48
> #define EXIT_REASON_EPT_MISCONFIG 49
> +#define EXIT_REASON_PREEMPTION_TIMER 52
> #define EXIT_REASON_WBINVD 54
> #define EXIT_REASON_XSETBV 55
> #define EXIT_REASON_APIC_WRITE 56
> @@ -110,7 +111,7 @@
> { EXIT_REASON_EOI_INDUCED, "EOI_INDUCED" }, \
> { EXIT_REASON_INVALID_STATE, "INVALID_STATE" }, \
> { EXIT_REASON_INVD, "INVD" }, \
> - { EXIT_REASON_INVPCID, "INVPCID" }
> -
> + { EXIT_REASON_INVPCID, "INVPCID" }, \
> + { EXIT_REASON_PREEMPTION_TIMER, "PREEMPTION_TIMER" }
>
> #endif /* _UAPIVMX_H */
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 0f0cc6a..5b8eeb6 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -298,7 +298,8 @@ struct __packed vmcs12 {
> u32 guest_activity_state;
> u32 guest_sysenter_cs;
> u32 host_ia32_sysenter_cs;
> - u32 padding32[8]; /* room for future expansion */
> + u32 vmx_preemption_timer_value;
> + u32 padding32[7]; /* room for future expansion */
> u16 virtual_processor_id;
> u16 guest_es_selector;
> u16 guest_cs_selector;
> @@ -537,6 +538,7 @@ static const unsigned short vmcs_field_to_offset_table[] = {
> FIELD(GUEST_ACTIVITY_STATE, guest_activity_state),
> FIELD(GUEST_SYSENTER_CS, guest_sysenter_cs),
> FIELD(HOST_IA32_SYSENTER_CS, host_ia32_sysenter_cs),
> + FIELD(VMX_PREEMPTION_TIMER_VALUE, vmx_preemption_timer_value),
> FIELD(CR0_GUEST_HOST_MASK, cr0_guest_host_mask),
> FIELD(CR4_GUEST_HOST_MASK, cr4_guest_host_mask),
> FIELD(CR0_READ_SHADOW, cr0_read_shadow),
> @@ -2049,7 +2051,8 @@ static __init void nested_vmx_setup_ctls_msrs(void)
> */
> nested_vmx_pinbased_ctls_low |= PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR;
> nested_vmx_pinbased_ctls_high &= PIN_BASED_EXT_INTR_MASK |
> - PIN_BASED_NMI_EXITING | PIN_BASED_VIRTUAL_NMIS;
> + PIN_BASED_NMI_EXITING | PIN_BASED_VIRTUAL_NMIS |
> + PIN_BASED_VMX_PREEMPTION_TIMER;
> nested_vmx_pinbased_ctls_high |= PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR;
>
> /*
> @@ -2110,7 +2113,8 @@ static __init void nested_vmx_setup_ctls_msrs(void)
>
> /* miscellaneous data */
> rdmsr(MSR_IA32_VMX_MISC, nested_vmx_misc_low, nested_vmx_misc_high);
> - nested_vmx_misc_low &= VMX_MISC_SAVE_EFER_LMA;
> + nested_vmx_misc_low &= VMX_MISC_PREEMPTION_TIMER_RATE_MASK |
> + VMX_MISC_SAVE_EFER_LMA;
> nested_vmx_misc_high = 0;
> }
>
> @@ -6191,6 +6195,9 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
> case EXIT_REASON_EPT_VIOLATION:
> case EXIT_REASON_EPT_MISCONFIG:
> return 0;
> + case EXIT_REASON_PREEMPTION_TIMER:
> + return vmcs12->pin_based_vm_exec_control &
> + PIN_BASED_VMX_PREEMPTION_TIMER;
> case EXIT_REASON_WBINVD:
> return nested_cpu_has2(vmcs12, SECONDARY_EXEC_WBINVD_EXITING);
> case EXIT_REASON_XSETBV:
> @@ -6984,6 +6991,10 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
> (vmcs_config.pin_based_exec_ctrl |
> vmcs12->pin_based_vm_exec_control));
>
> + if (vmcs12->pin_based_vm_exec_control & PIN_BASED_VMX_PREEMPTION_TIMER)
> + vmcs_write32(VMX_PREEMPTION_TIMER_VALUE,
> + vmcs12->vmx_preemption_timer_value);
> +
> /*
> * Whether page-faults are trapped is determined by a combination of
> * 3 settings: PFEC_MASK, PFEC_MATCH and EXCEPTION_BITMAP.PF.
> --
> 1.7.3.4
--
Gleb.
^ permalink raw reply [flat|nested] 9+ messages in thread