From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH 02/11] nEPT: Add EPT tables support to paging_tmpl.h Date: Mon, 29 Apr 2013 17:05:58 +0200 Message-ID: <517E8C56.4080105@redhat.com> References: <1366958611-6935-1-git-send-email-jun.nakajima@intel.com> <1366958611-6935-2-git-send-email-jun.nakajima@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org To: Jun Nakajima Return-path: Received: from mail-qa0-f41.google.com ([209.85.216.41]:55516 "EHLO mail-qa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753204Ab3D2PGO (ORCPT ); Mon, 29 Apr 2013 11:06:14 -0400 Received: by mail-qa0-f41.google.com with SMTP id hg5so1082851qab.0 for ; Mon, 29 Apr 2013 08:06:13 -0700 (PDT) In-Reply-To: <1366958611-6935-2-git-send-email-jun.nakajima@intel.com> Sender: kvm-owner@vger.kernel.org List-ID: Il 26/04/2013 08:43, Jun Nakajima ha scritto: > This is the first patch in a series which adds nested EPT support to KVM's > nested VMX. Nested EPT means emulating EPT for an L1 guest so that L1 can use > EPT when running a nested guest L2. When L1 uses EPT, it allows the L2 guest > to set its own cr3 and take its own page faults without either of L0 or L1 > getting involved. This often significanlty improves L2's performance over the > previous two alternatives (shadow page tables over EPT, and shadow page > tables over shadow page tables). > > This patch adds EPT support to paging_tmpl.h. > > paging_tmpl.h contains the code for reading and writing page tables. The code > for 32-bit and 64-bit tables is very similar, but not identical, so > paging_tmpl.h is #include'd twice in mmu.c, once with PTTTYPE=32 and once > with PTTYPE=64, and this generates the two sets of similar functions. > > There are subtle but important differences between the format of EPT tables > and that of ordinary x86 64-bit page tables, so for nested EPT we need a > third set of functions to read the guest EPT table and to write the shadow > EPT table. > > So this patch adds third PTTYPE, PTTYPE_EPT, which creates functions (prefixed > with "EPT") which correctly read and write EPT tables. > > Signed-off-by: Nadav Har'El > Signed-off-by: Jun Nakajima > Signed-off-by: Xinhao Xu > --- > arch/x86/kvm/mmu.c | 35 ++---------- > arch/x86/kvm/paging_tmpl.h | 133 ++++++++++++++++++++++++++++++++++++++++++--- > 2 files changed, 130 insertions(+), 38 deletions(-) I would split this patch so that first prefetch_invalid_gpte and gpte_access are moved to paging_tmpl.h (adding the FNAME everywhere). The second patch then can add the EPT special cases. > > +static inline int FNAME(check_write_user_access)(struct kvm_vcpu *vcpu, > + bool write_fault, bool user_fault, > + unsigned long pte) > +{ > +#if PTTYPE == PTTYPE_EPT > + if (unlikely(write_fault && !(pte & VMX_EPT_WRITABLE_MASK) > + && (user_fault || is_write_protection(vcpu)))) > + return false; > + return true; > +#else > + u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0) > + | (write_fault ? PFERR_WRITE_MASK : 0); > > + return !permission_fault(vcpu->arch.walk_mmu, vcpu->arch.access, access); > +#endif > +} > + I think check_write_user_access doesn't exist anymore? Perhaps a wrong conflict resolution. Paolo