From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= Subject: Re: [Qemu-devel] [PATCH] i386: forward CPUID cache leaves when -cpu host is used Date: Mon, 02 Sep 2013 14:55:36 +0200 Message-ID: <52248AC8.4040404@suse.de> References: <1377635906-17274-1-git-send-email-benoit@irqsave.net> <1377635906-17274-2-git-send-email-benoit@irqsave.net> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: qemu-devel@nongnu.org, imammedo@redhat.com, ehabkost@redhat.com, "kvm@vger.kernel.org list" To: =?ISO-8859-15?Q?Beno=EEt_Canet?= Return-path: Received: from cantor2.suse.de ([195.135.220.15]:50743 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758455Ab3IBMzk (ORCPT ); Mon, 2 Sep 2013 08:55:40 -0400 In-Reply-To: <1377635906-17274-2-git-send-email-benoit@irqsave.net> Sender: kvm-owner@vger.kernel.org List-ID: Hi, "target-i386:" please. Am 27.08.2013 22:38, schrieb Beno=EEt Canet: > Some users running cpu intensive tasks checking the cache CPUID leave= s at > startup and making decisions based on the result reported that the gu= est was > not reflecting the host CPUID leaves when -cpu host is used. >=20 > This patch fix this. >=20 > Signed-off-by: Benoit Canet > --- > target-i386/cpu.c | 19 +++++++++++++++++++ > target-i386/cpu.h | 1 + > 2 files changed, 20 insertions(+) >=20 > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index 42c5de0..2c8eaf7 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -374,6 +374,7 @@ typedef struct x86_def_t { > int stepping; > FeatureWordArray features; > char model_id[48]; > + bool fwd_cpuid_cache_leaves; > } x86_def_t; > =20 > #define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE) > @@ -1027,6 +1028,7 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cp= u_def) > assert(kvm_enabled()); > =20 > x86_cpu_def->name =3D "host"; > + x86_cpu_def->fwd_cpuid_cache_leaves =3D true; > host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx); > x86_cpu_vendor_words2str(x86_cpu_def->vendor, ebx, edx, ecx); > =20 > @@ -1776,6 +1778,7 @@ static void cpu_x86_register(X86CPU *cpu, const= char *name, Error **errp) > env->features[FEAT_C000_0001_EDX] =3D def->features[FEAT_C000_00= 01_EDX]; > env->features[FEAT_7_0_EBX] =3D def->features[FEAT_7_0_EBX]; > env->cpuid_xlevel2 =3D def->xlevel2; > + env->fwd_cpuid_cache_leaves =3D def->fwd_cpuid_cache_leaves; > =20 > object_property_set_str(OBJECT(cpu), def->model_id, "model-id", = errp); > } > @@ -1949,6 +1952,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t = index, uint32_t count, > } > break; > case 2: > + if (env->fwd_cpuid_cache_leaves) { > + host_cpuid(0x2, 0, eax, ebx, ecx, edx); > + break; > + } > /* cache info: needed for Pentium Pro compatibility */ > *eax =3D 1; > *ebx =3D 0; > @@ -1956,6 +1963,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t = index, uint32_t count, > *edx =3D 0x2c307d; > break; > case 4: > + if (env->fwd_cpuid_cache_leaves) { > + host_cpuid(0x4, count, eax, ebx, ecx, edx); > + break; > + } > /* cache info: needed for Core compatibility */ > if (cs->nr_cores > 1) { > *eax =3D (cs->nr_cores - 1) << 26; > @@ -2102,6 +2113,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t = index, uint32_t count, > break; > case 0x80000005: > /* cache info (L1 cache) */ > + if (env->fwd_cpuid_cache_leaves) { > + host_cpuid(0x80000005, 0, eax, ebx, ecx, edx); > + break; > + } > *eax =3D 0x01ff01ff; > *ebx =3D 0x01ff01ff; > *ecx =3D 0x40020140; > @@ -2109,6 +2124,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t = index, uint32_t count, > break; > case 0x80000006: > /* cache info (L2 cache) */ > + if (env->fwd_cpuid_cache_leaves) { > + host_cpuid(0x80000006, 0, eax, ebx, ecx, edx); > + break; > + } > *eax =3D 0; > *ebx =3D 0x42004200; > *ecx =3D 0x02008140; This hunk may trivially conflict with Eduardo's cache flags cleanup. > diff --git a/target-i386/cpu.h b/target-i386/cpu.h > index 8a3d0fd..1ec32fa 100644 > --- a/target-i386/cpu.h > +++ b/target-i386/cpu.h > @@ -865,6 +865,7 @@ typedef struct CPUX86State { > bool tsc_valid; > int tsc_khz; > void *kvm_xsave_buf; > + bool fwd_cpuid_cache_leaves; > =20 > /* in order to simplify APIC support, we leave this pointer to t= he > user */ Please place the field in X86CPU instead and document it. Otherwise patch looks okay to me on a brief sight; but since this is about -cpu host I would prefer this to go through uq/master once fixed or at least to get some acks. Regards, Andreas --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrn= berg