From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH 14/21] MIPS: KVM: Add nanosecond count bias KVM register Date: Wed, 28 May 2014 18:24:04 +0200 Message-ID: <53860DA4.9020703@redhat.com> References: <1398439204-26171-1-git-send-email-james.hogan@imgtec.com> <1398439204-26171-15-git-send-email-james.hogan@imgtec.com> <535A9AF5.30105@gmail.com> <2197488.6tnytXFBJm@radagast> <535B7E58.4070304@redhat.com> <5385F0E4.1080207@imgtec.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: linux-mips@linux-mips.org, Gleb Natapov , kvm@vger.kernel.org, Ralf Baechle , Sanjay Lal , qemu-devel To: James Hogan , David Daney , David Daney , Andreas Herrmann Return-path: In-Reply-To: <5385F0E4.1080207@imgtec.com> Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-subscribe: List-owner: List-post: List-archive: List-Id: kvm.vger.kernel.org Il 28/05/2014 16:21, James Hogan ha scritto: > The implementation in QEMU that I've settled upon makes do with just > COUNT_CTL and COUNT_RESUME, but with a slight kernel modification so > that COUNT_RESUME is writeable (to any positive monotonic nanosecond > value <= now). It works fairly cleanly and correctly even with stopping > and starting VM clock (gdb, stop/cont, savevm/loadvm, live migration), > to match the behaviour of the existing mips cpu timer emulation, so I > plan to drop this bias patch, and will post a v2 patchset soon with just > a few modifications. It makes sense to have writable registers in the emulator, even if they are read-only in real hardware. We also do that for x86, FWIW. So the idea looks okay to me. Paolo