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* [PATCH 1/1] KVM: SVM: add rdmsr support for AMD event registers
@ 2014-08-13 15:58 Wei Huang
  2014-08-13 16:04 ` Wei Huang
  0 siblings, 1 reply; 4+ messages in thread
From: Wei Huang @ 2014-08-13 15:58 UTC (permalink / raw)
  To: kvm; +Cc: pbonzini, gleb, wehuang

Current KVM only supports RDMSR for K7_EVNTSEL0 and K7_EVNTSEL0
MSRs. Reading the rest MSRs will trigger KVM to inject #GP into
guest VM. This causes a warning message "Failed to access perfctr
msr (MSR c0010001 is ffffffffffffffff)" on AMD host. This patch
adds RDMSR support for all K7_EVNTSELn and K7_EVNTSELn registers
and thus supresses the warning message.

Signed-off-by: Wei Huang <wehuang@redhat.com>
---
 arch/x86/kvm/x86.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index ef432f8..3f10ca2 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2399,7 +2399,13 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 	case MSR_K7_HWCR:
 	case MSR_VM_HSAVE_PA:
 	case MSR_K7_EVNTSEL0:
+	case MSR_K7_EVNTSEL1:
+	case MSR_K7_EVNTSEL2:
+	case MSR_K7_EVNTSEL3:
 	case MSR_K7_PERFCTR0:
+	case MSR_K7_PERFCTR1:
+	case MSR_K7_PERFCTR2:
+	case MSR_K7_PERFCTR3:
 	case MSR_K8_INT_PENDING_MSG:
 	case MSR_AMD64_NB_CFG:
 	case MSR_FAM10H_MMIO_CONF_BASE:
-- 
1.8.3.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/1] KVM: SVM: add rdmsr support for AMD event registers
  2014-08-13 15:58 [PATCH 1/1] KVM: SVM: add rdmsr support for AMD event registers Wei Huang
@ 2014-08-13 16:04 ` Wei Huang
  0 siblings, 0 replies; 4+ messages in thread
From: Wei Huang @ 2014-08-13 16:04 UTC (permalink / raw)
  To: kvm; +Cc: pbonzini, gleb

Wrong one, sorry. Please discard this one. Updated one will follow.

-Wei

On 08/13/2014 10:58 AM, Wei Huang wrote:
> Current KVM only supports RDMSR for K7_EVNTSEL0 and K7_EVNTSEL0
> MSRs. Reading the rest MSRs will trigger KVM to inject #GP into
> guest VM. This causes a warning message "Failed to access perfctr
> msr (MSR c0010001 is ffffffffffffffff)" on AMD host. This patch
> adds RDMSR support for all K7_EVNTSELn and K7_EVNTSELn registers
> and thus supresses the warning message.
>
> Signed-off-by: Wei Huang <wehuang@redhat.com>
> ---
>   arch/x86/kvm/x86.c | 6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index ef432f8..3f10ca2 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -2399,7 +2399,13 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
>   	case MSR_K7_HWCR:
>   	case MSR_VM_HSAVE_PA:
>   	case MSR_K7_EVNTSEL0:
> +	case MSR_K7_EVNTSEL1:
> +	case MSR_K7_EVNTSEL2:
> +	case MSR_K7_EVNTSEL3:
>   	case MSR_K7_PERFCTR0:
> +	case MSR_K7_PERFCTR1:
> +	case MSR_K7_PERFCTR2:
> +	case MSR_K7_PERFCTR3:
>   	case MSR_K8_INT_PENDING_MSG:
>   	case MSR_AMD64_NB_CFG:
>   	case MSR_FAM10H_MMIO_CONF_BASE:
>

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [PATCH 1/1] KVM: SVM: add rdmsr support for AMD event registers
@ 2014-08-13 16:06 Wei Huang
  2014-08-18  8:36 ` Paolo Bonzini
  0 siblings, 1 reply; 4+ messages in thread
From: Wei Huang @ 2014-08-13 16:06 UTC (permalink / raw)
  To: kvm; +Cc: pbonzini, gleb, wehuang

Current KVM only supports RDMSR for K7_EVNTSEL0 and K7_PERFCTR0
MSRs. Reading the rest MSRs will trigger KVM to inject #GP into
guest VM. This causes a warning message "Failed to access perfctr
msr (MSR c0010001 is ffffffffffffffff)" on AMD host. This patch
adds RDMSR support for all K7_EVNTSELn and K7_PERFCTRn registers
and thus supresses the warning message.

Signed-off-by: Wei Huang <wehuang@redhat.com>
---
 arch/x86/kvm/x86.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index ef432f8..3f10ca2 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2399,7 +2399,13 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
 	case MSR_K7_HWCR:
 	case MSR_VM_HSAVE_PA:
 	case MSR_K7_EVNTSEL0:
+	case MSR_K7_EVNTSEL1:
+	case MSR_K7_EVNTSEL2:
+	case MSR_K7_EVNTSEL3:
 	case MSR_K7_PERFCTR0:
+	case MSR_K7_PERFCTR1:
+	case MSR_K7_PERFCTR2:
+	case MSR_K7_PERFCTR3:
 	case MSR_K8_INT_PENDING_MSG:
 	case MSR_AMD64_NB_CFG:
 	case MSR_FAM10H_MMIO_CONF_BASE:
-- 
1.8.3.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH 1/1] KVM: SVM: add rdmsr support for AMD event registers
  2014-08-13 16:06 Wei Huang
@ 2014-08-18  8:36 ` Paolo Bonzini
  0 siblings, 0 replies; 4+ messages in thread
From: Paolo Bonzini @ 2014-08-18  8:36 UTC (permalink / raw)
  To: Wei Huang, kvm; +Cc: gleb

Il 13/08/2014 18:06, Wei Huang ha scritto:
> Current KVM only supports RDMSR for K7_EVNTSEL0 and K7_PERFCTR0
> MSRs. Reading the rest MSRs will trigger KVM to inject #GP into
> guest VM. This causes a warning message "Failed to access perfctr
> msr (MSR c0010001 is ffffffffffffffff)" on AMD host. This patch
> adds RDMSR support for all K7_EVNTSELn and K7_PERFCTRn registers
> and thus supresses the warning message.
> 
> Signed-off-by: Wei Huang <wehuang@redhat.com>
> ---
>  arch/x86/kvm/x86.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index ef432f8..3f10ca2 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -2399,7 +2399,13 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
>  	case MSR_K7_HWCR:
>  	case MSR_VM_HSAVE_PA:
>  	case MSR_K7_EVNTSEL0:
> +	case MSR_K7_EVNTSEL1:
> +	case MSR_K7_EVNTSEL2:
> +	case MSR_K7_EVNTSEL3:
>  	case MSR_K7_PERFCTR0:
> +	case MSR_K7_PERFCTR1:
> +	case MSR_K7_PERFCTR2:
> +	case MSR_K7_PERFCTR3:
>  	case MSR_K8_INT_PENDING_MSG:
>  	case MSR_AMD64_NB_CFG:
>  	case MSR_FAM10H_MMIO_CONF_BASE:
> 

Thanks, applying for 3.18.

Paolo

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2014-08-18  8:36 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2014-08-13 15:58 [PATCH 1/1] KVM: SVM: add rdmsr support for AMD event registers Wei Huang
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2014-08-13 16:06 Wei Huang
2014-08-18  8:36 ` Paolo Bonzini

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