From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH kvm-unit-tests v2] x86: Test task-switch with cs.rpl != cs.dpl Date: Tue, 19 Aug 2014 15:28:19 +0200 Message-ID: <53F350F3.1060206@redhat.com> References: <53F32679.6030607@redhat.com> <1408453449-4243-1-git-send-email-namit@cs.technion.ac.il> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org To: Nadav Amit , gleb@kernel.org Return-path: Received: from mail-wi0-f178.google.com ([209.85.212.178]:56913 "EHLO mail-wi0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750789AbaHSN2Z (ORCPT ); Tue, 19 Aug 2014 09:28:25 -0400 Received: by mail-wi0-f178.google.com with SMTP id hi2so5277370wib.17 for ; Tue, 19 Aug 2014 06:28:23 -0700 (PDT) In-Reply-To: <1408453449-4243-1-git-send-email-namit@cs.technion.ac.il> Sender: kvm-owner@vger.kernel.org List-ID: Il 19/08/2014 15:04, Nadav Amit ha scritto: > Commit 5045b46803 added a check that cs.dpl equals cs.rpl during task-switch. > This is a wrong check, and this patch introduces a test in which cs.dpl != > cs.rpl. To do so, it configures tss.cs to be conforming with rpl=3 and dpl=0. > Since the cpl after calling is 3, it does not make any prints in the callee. > > Signed-off-by: Nadav Amit > --- > x86/taskswitch2.c | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/x86/taskswitch2.c b/x86/taskswitch2.c > index 92fc941..1fe833e 100644 > --- a/x86/taskswitch2.c > +++ b/x86/taskswitch2.c > @@ -7,6 +7,7 @@ > > #define MAIN_TSS_SEL (FIRST_SPARE_SEL + 0) > #define VM86_TSS_SEL (FIRST_SPARE_SEL + 8) > +#define CONFORM_CS_SEL (FIRST_SPARE_SEL + 16) > > static volatile int test_count; > static volatile unsigned int test_divider; > @@ -102,6 +103,14 @@ start: > goto start; > } > > +static void user_tss(void) > +{ > +start: > + test_count++; > + asm volatile ("iret"); > + goto start; > +} > + > void test_kernel_mode_int() > { > unsigned int res; > @@ -248,6 +257,19 @@ void test_vm86_switch(void) > report("VM86", 1); > } > > +void test_conforming_switch(void) > +{ > + /* test lcall with conforming segment, cs.dpl != cs.rpl */ > + test_count = 0; > + set_intr_task_gate(0, user_tss); No need to use set_intr_task_gate, since the IDT is not involved here. tss_intr.eip = (u32)user_tss; is enough. I fixed this up and applied the patch. Thanks! Paolo > + > + tss_intr.cs = CONFORM_CS_SEL | 3; > + tss_intr.ds = tss_intr.gs = tss_intr.fs = tss_intr.ss = USER_DS; > + set_gdt_entry(CONFORM_CS_SEL, 0, 0xffffffff, 0x9f, 0xc0); > + asm volatile("lcall $" xstr(TSS_INTR) ", $0xf4f4f4f4"); > + report("lcall with cs.rpl != cs.dpl", test_count == 1); > +} > + > int main() > { > setup_vm(); > @@ -256,6 +278,7 @@ int main() > > test_kernel_mode_int(); > test_vm86_switch(); > + test_conforming_switch(); > > return report_summary(); > } >