From mboxrd@z Thu Jan  1 00:00:00 1970
From: Joel Schopp <joel.schopp@amd.com>
Subject: Re: [PATCH v5] arm64: fix VTTBR_BADDR_MASK
Date: Tue, 19 Aug 2014 10:16:12 -0500
Message-ID: <53F36A3C.4060104@amd.com>
References: <20140818203604.4654.99905.stgit@joelaarch64.amd.com>
 <20140819122420.GC31086@cbox> <53F35DFD.9070804@amd.com>
 <20140819143834.GE31086@cbox> <53F363E3.8060108@amd.com>
 <20140819145933.GF31086@cbox>
Mime-Version: 1.0
Content-Type: text/plain; charset="ISO-8859-1"
Content-Transfer-Encoding: 7bit
Cc: <kvmarm@lists.cs.columbia.edu>,
	<linux-arm-kernel@lists.infradead.org>, <kvm@vger.kernel.org>,
	Sungjinn Chung <sungjinn.chung@samsung.com>,
	Jungseok Lee <jays.lee@samsung.com>
To: Christoffer Dall <christoffer.dall@linaro.org>
Return-path: <kvm-owner@vger.kernel.org>
Received: from mail-by2lp0236.outbound.protection.outlook.com ([207.46.163.236]:19545
	"EHLO na01-by2-obe.outbound.protection.outlook.com"
	rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP
	id S1753694AbaHSPSo (ORCPT <rfc822;kvm@vger.kernel.org>);
	Tue, 19 Aug 2014 11:18:44 -0400
In-Reply-To: <20140819145933.GF31086@cbox>
Sender: kvm-owner@vger.kernel.org
List-ID: <kvm.vger.kernel.org>


> hmmm, the point is that we need to ensure that we have a properly
> aligned allocated PGD, that's what this patch currently addresses, and as
> you pointed out, the BUG_ON() just before trying to run a VM is not the
> nicest solution - we should really be dealing with this properly at
> allocation time.
>
> But, if you don't have time to look at that, then ok, I'll have to pick
> it up myself.
>
> However, you are hinting that we do not support 4 levels of page tables,
> yet you do allow the t0sz_to_vttbr_x funciton to pass even when using
> t0sz values only supported under 4 levels of page tables....  What is
> the rationale for that?
Minimizing merge conflicts. I figure both are going in within the next
month or two.