[PATCH] KVM: mmio: cleanup kvm_set_mmio_spte_mask

[PATCH] KVM: mmio: cleanup kvm_set_mmio_spte_mask

[Tiejun Chen]

Just reuse rsvd_bits() inside kvm_set_mmio_spte_mask()
for slightly better code.

Signed-off-by: Tiejun Chen <tiejun.chen@intel.com>
---
 arch/x86/kvm/mmu.c | 5 -----
 arch/x86/kvm/mmu.h | 5 +++++
 arch/x86/kvm/x86.c | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 9314678..ae5a085 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -296,11 +296,6 @@ static bool check_mmio_spte(struct kvm *kvm, u64 spte)
 	return likely(kvm_gen == spte_gen);
 }
 
-static inline u64 rsvd_bits(int s, int e)
-{
-	return ((1ULL << (e - s + 1)) - 1) << s;
-}
-
 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
 		u64 dirty_mask, u64 nx_mask, u64 x_mask)
 {
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index b982112..bde8ee7 100644
--- a/arch/x86/kvm/mmu.h
+++ b/arch/x86/kvm/mmu.h
@@ -56,6 +56,11 @@
 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
 
+static inline u64 rsvd_bits(int s, int e)
+{
+	return ((1ULL << (e - s + 1)) - 1) << s;
+}
+
 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]);
 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask);
 
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 8f1e22d..a933d4e 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -5545,7 +5545,7 @@ static void kvm_set_mmio_spte_mask(void)
 	 * entry to generate page fault with PFER.RSV = 1.
 	 */
 	 /* Mask the reserved physical address bits. */
-	mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
+	mask = rsvd_bits(maxphyaddr, 51);
 
 	/* Bit 62 is always reserved for 32bit host. */
 	mask |= 0x3ull << 62;
-- 
1.9.1

Re: [PATCH] KVM: mmio: cleanup kvm_set_mmio_spte_mask

[Paolo Bonzini]

Il 01/09/2014 12:44, Tiejun Chen ha scritto:
> Just reuse rsvd_bits() inside kvm_set_mmio_spte_mask()
> for slightly better code.
> 
> Signed-off-by: Tiejun Chen <tiejun.chen@intel.com>
> ---
>  arch/x86/kvm/mmu.c | 5 -----
>  arch/x86/kvm/mmu.h | 5 +++++
>  arch/x86/kvm/x86.c | 2 +-
>  3 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
> index 9314678..ae5a085 100644
> --- a/arch/x86/kvm/mmu.c
> +++ b/arch/x86/kvm/mmu.c
> @@ -296,11 +296,6 @@ static bool check_mmio_spte(struct kvm *kvm, u64 spte)
>  	return likely(kvm_gen == spte_gen);
>  }
>  
> -static inline u64 rsvd_bits(int s, int e)
> -{
> -	return ((1ULL << (e - s + 1)) - 1) << s;
> -}
> -
>  void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
>  		u64 dirty_mask, u64 nx_mask, u64 x_mask)
>  {
> diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
> index b982112..bde8ee7 100644
> --- a/arch/x86/kvm/mmu.h
> +++ b/arch/x86/kvm/mmu.h
> @@ -56,6 +56,11 @@
>  #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
>  #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
>  
> +static inline u64 rsvd_bits(int s, int e)
> +{
> +	return ((1ULL << (e - s + 1)) - 1) << s;
> +}
> +
>  int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]);
>  void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask);
>  
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 8f1e22d..a933d4e 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -5545,7 +5545,7 @@ static void kvm_set_mmio_spte_mask(void)
>  	 * entry to generate page fault with PFER.RSV = 1.
>  	 */
>  	 /* Mask the reserved physical address bits. */
> -	mask = ((1ull << (51 - maxphyaddr + 1)) - 1) << maxphyaddr;
> +	mask = rsvd_bits(maxphyaddr, 51);
>  
>  	/* Bit 62 is always reserved for 32bit host. */
>  	mask |= 0x3ull << 62;
> 

Nice, thanks.

Paolo