From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH] KVM: x86: Remove debug assertion of non-PAE reserved bits Date: Tue, 23 Sep 2014 10:02:50 +0200 Message-ID: <5421292A.2060609@redhat.com> References: <1411455717-3773-1-git-send-email-namit@cs.technion.ac.il> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org To: Nadav Amit Return-path: Received: from mail-wg0-f45.google.com ([74.125.82.45]:41995 "EHLO mail-wg0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752732AbaIWIC4 (ORCPT ); Tue, 23 Sep 2014 04:02:56 -0400 Received: by mail-wg0-f45.google.com with SMTP id x13so3383813wgg.4 for ; Tue, 23 Sep 2014 01:02:54 -0700 (PDT) In-Reply-To: <1411455717-3773-1-git-send-email-namit@cs.technion.ac.il> Sender: kvm-owner@vger.kernel.org List-ID: Il 23/09/2014 09:01, Nadav Amit ha scritto: > Commit 346874c9507a ("KVM: x86: Fix CR3 reserved bits") removed non-PAE > reserved bits which were not according to Intel SDM. However, residue was left > in a debug assertion (CR3_NONPAE_RESERVED_BITS). Remove it. > > Signed-off-by: Nadav Amit > --- > arch/x86/kvm/paging_tmpl.h | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h > index 0ab6c65..806d58e 100644 > --- a/arch/x86/kvm/paging_tmpl.h > +++ b/arch/x86/kvm/paging_tmpl.h > @@ -298,8 +298,7 @@ retry_walk: > } > #endif > walker->max_level = walker->level; > - ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) || > - (mmu->get_cr3(vcpu) & CR3_NONPAE_RESERVED_BITS) == 0); > + ASSERT(!is_long_mode(vcpu) && is_pae(vcpu)); > > accessed_dirty = PT_GUEST_ACCESSED_MASK; > pt_access = pte_access = ACC_ALL; > Thanks, applied. Paolo