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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: M5Iw+ukw5TcI8vv2AD1twvPI8Vp7ofucCNnNMz6fdjwMyjiM6TNQOXRW/Llv6CdNOQi6XqN2fOZEXNo1ECangvH1A9qAJZad50ZpxaTiP840PS95pud/J2JuIsu3fcpgMssgAdMidfv0rO1w8k3rDNKRaQOsDtrZKpgosTXnlegeIlCuJYlesdhkeQsbY/ryNPYmNZnl6jlEC0eDEObqFaHa7bHTTt8+xR3j3sivOO6j1VV5UbkYStra0jBaSgMOSuXOiXo4hE5G5G85FpkZIRyYiI4va+bBMXBkyzfaaJ5EROmYF240tenBXx8yH31FFqwiy58Rv7PHrueuQt89Ymob8Xo0MELBNcRhGBp1r/mo/QebYAmxBu6zy+H7RKH/ArVUH+bC3FLovHxP9eVeT0d20uTyqZ5BrJciwXkDAQ0l17pIkRi8E6UEPsPxdO1n X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Oct 2026 06:31:23.4123 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b6c2f770-ec0a-4f1f-25a0-08df2daa986e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MW1PEPF0001888F.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA4PR12MB9763 On 10/15/2026 12:33 PM, sashiko-bot@kernel.org wrote: > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: > - [Low] iommu/amd: stale gappi_dis hardware flag in IRTE when is_running=true > -- > > commit fed3ee87aa05f53cbc2ccd8dd9c45c2a8ad8bb44 > Author: Sairaj Kodilkar > > iommu/amd: Program guest-mode IRTEs for GAPPI wakeup when IRTE[IsRun] = 0 > > This commit enables programming the IRTE for Guest APIC Physical Processor > Interrupt (GAPPI) wakeup when a vCPU is not running. It allows suppressing > these interrupts using the IRTE[GAPPIDis] bit when KVM does not request a > wakeup interrupt. > >> diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c >> index c0eec32ee3cb6..7ceb6bf508f03 100644 >> --- a/drivers/iommu/amd/iommu.c >> +++ b/drivers/iommu/amd/iommu.c >> @@ -4004,8 +4004,18 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int apicid, >> entry->lo.fields_vapic.is_run = true; >> entry->lo.fields_vapic.ga_log_intr = false; > > [Severity: Low] > When a vCPU transitions to the running state, ga_log_intr is explicitly > cleared here. Does gappi_dis also need to be cleared? > > If a vCPU transitions to is_running=false with wakeup_intr=false, > gappi_dis can be set to 1 in the newly added else branch below. When the > vCPU transitions back to is_running=true, this code path is taken, but it > leaves the gappi_dis bit stale. > > Could this cause unintended interrupt suppression or hardware state mismatches > if the IOMMU hardware evaluates the bit unexpectedly? > The gappi_dis bit is evaluated only when is_run is false and is otherwise ignored, hence it is safe to not assign gappi_dis=1 when vCPU transitions to running state. Thanks Sairaj >> } else { >> - entry->lo.fields_vapic.is_run = false; >> - entry->lo.fields_vapic.ga_log_intr = wakeup_intr; >> + if (amd_iommu_gappi) { >> + entry->lo.fields_vapic.gappi_dis = !wakeup_intr && >> + check_feature2(FEATURE_GAPPIDISSUP); >> + entry->lo.fields_vapic.is_run = false; >> + entry->lo.fields_vapic.destination = >> + APICID_TO_IRTE_DEST_LO(apicid); >> + entry->hi.fields.destination = >> + APICID_TO_IRTE_DEST_HI(apicid); >> + } else { >> + entry->lo.fields_vapic.is_run = false; >> + entry->lo.fields_vapic.ga_log_intr = wakeup_intr; >> + } >> } >> } >