From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH 3/3] arm, arm64: KVM: handle potential incoherency of readonly memslots Date: Mon, 17 Nov 2014 16:29:50 +0100 Message-ID: <546A146E.1020804@redhat.com> References: <1416236333-9378-1-git-send-email-ard.biesheuvel@linaro.org> <1416236333-9378-3-git-send-email-ard.biesheuvel@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org To: Ard Biesheuvel , kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, lersek@redhat.com, drjones@redhat.com, wei@redhat.com Return-path: Received: from mail-wi0-f182.google.com ([209.85.212.182]:57134 "EHLO mail-wi0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750823AbaKQP36 (ORCPT ); Mon, 17 Nov 2014 10:29:58 -0500 Received: by mail-wi0-f182.google.com with SMTP id h11so9469270wiw.15 for ; Mon, 17 Nov 2014 07:29:57 -0800 (PST) In-Reply-To: <1416236333-9378-3-git-send-email-ard.biesheuvel@linaro.org> Sender: kvm-owner@vger.kernel.org List-ID: On 17/11/2014 15:58, Ard Biesheuvel wrote: > Readonly memslots are often used to implement emulation of ROMs and > NOR flashes, in which case the guest may legally map these regions as > uncached. > To deal with the incoherency associated with uncached guest mappings, > treat all readonly memslots as incoherent, and ensure that pages that > belong to regions tagged as such are flushed to DRAM before being passed > to the guest. On x86, the processor combines the cacheability values from the two levels of page tables. Is there no way to do the same on ARM? Paolo