From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jan Kiszka <jan.kiszka@web.de>
Subject: Re: [PATCH RFC] KVM: x86: nested: support for MSR loading/storing
Date: Mon, 08 Dec 2014 08:07:25 +0100
Message-ID: <54854E2D.2010900@web.de>
References: <20141205225707.GA6689@gnote> <jpgfvcrkd24.fsf@redhat.com> <54842A3C.503@web.de> <CACzj_yWP0QBHK+n3QdyLdg-JEU9DrUzPC-ahSyLUGRW=JrtvNQ@mail.gmail.com> <CACzj_yU+xCY3bHVPh-SQ0y-M+NEoUYEAzH=XLgza3hMGw1V6wg@mail.gmail.com> <CACzj_yV6JnFP=Y8o=rtFGY6MZgqBg9sYbPm14SEkFgzB7-PWDA@mail.gmail.com>
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Cc: Bandan Das <bsd@redhat.com>,
	Eugene Korenevsky <ekorenevsky@gmail.com>,
	Paolo Bonzini <pbonzini@redhat.com>, kvm@vger.kernel.org,
	Wanpeng Li <wanpeng.li@linux.intel.com>
To: Wincy Van <fanwenyi0529@gmail.com>
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On 2014-12-08 04:49, Wincy Van wrote:
>>>> +static bool vmx_msr_switch_area_verify(u32 count, u64 addr, int max=
phyaddr)
>>>> +{
>>>> +    if (count =3D=3D 0)
>>>> +            return true;
>>>> +    if ((addr & 0xf) !=3D 0)
>>
>> Bits 11:0 have to be zero, in fact (page alignment required).
>=20
>=20
> Why? According to SDM(24.8.2), "If the VM-entry MSR-load count is not z=
ero,
> the address must be 16-byte aligned."

True, sorry, confused with the MSR usage bitmap.

>=20
> I think the macro IS_ALIGNED would be better.

Yes.

Jan



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