From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [v3 13/26] KVM: Define a new interface kvm_find_dest_vcpu() for VT-d PI Date: Wed, 14 Jan 2015 14:02:14 +0100 Message-ID: <54B668D6.3070301@redhat.com> References: <1418397300-10870-1-git-send-email-feng.wu@intel.com> <1418397300-10870-14-git-send-email-feng.wu@intel.com> <20150109145435.GA22469@potion.brq.redhat.com> <54AFEC00.80507@redhat.com> <20150113161716.GA12941@potion.brq.redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: "kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "eric.auger-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org" , "gleb-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" , "x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org" , "mingo-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org" , "hpa-YMNOUZJC4hwAvxtiuMwx3w@public.gmane.org" , "tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org" , "dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org" , "jiang.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org" To: "Wu, Feng" , =?UTF-8?B?UmFkaW0gS3I/bcOhPw==?= Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org List-Id: kvm.vger.kernel.org On 14/01/2015 02:27, Wu, Feng wrote: > As discussed with Paolo before, as the first stage, we only support single-CPU > lowest priority for PI, since this is a new hardware feature enabling, Paolo trends > to do simple things in the beginning. :) Nice way to sum it up! Paolo > Then we will support full lowest priority for > it, such as, using vector hashing (this is one method of what hardware do for > lowest priority today), I need to get some detailed information about this from > hardware guys before enabling it.