From mboxrd@z Thu Jan  1 00:00:00 1970
From: Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PATCH v4 6/6] KVM: nVMX: Enable nested posted interrupt processing
Date: Mon, 02 Feb 2015 17:14:04 +0100
Message-ID: <54CFA24C.4080806@redhat.com>
References: <CACzj_yUUuR6grQyJWLAajay1BgNduUVWRRf5+AKKLjXTUmzZJQ@mail.gmail.com> <54CF5971.8090407@redhat.com> <CACzj_yUF+GHZ9Y0wc=6On2G+L0+B7g1VHybcXjwHpzxfo9ZzTA@mail.gmail.com>
Mime-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Transfer-Encoding: 8bit
Cc: "gleb@kernel.org" <gleb@kernel.org>,
	"Zhang, Yang Z" <yang.z.zhang@intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	Wanpeng Li <wanpeng.li@linux.intel.com>,
	Jan Kiszka <jan.kiszka@web.de>
To: Wincy Van <fanwenyi0529@gmail.com>
Return-path: <linux-kernel-owner@vger.kernel.org>
In-Reply-To: <CACzj_yUF+GHZ9Y0wc=6On2G+L0+B7g1VHybcXjwHpzxfo9ZzTA@mail.gmail.com>
Sender: linux-kernel-owner@vger.kernel.org
List-Id: kvm.vger.kernel.org



On 02/02/2015 16:33, Wincy Van wrote:
> static void vmx_accomp_nested_posted_intr(struct kvm_vcpu *vcpu)
> {
>         struct vcpu_vmx *vmx = to_vmx(vcpu);
> 
>         if (is_guest_mode(vcpu) &&
>             vmx->nested.posted_intr_nv != -1 &&
>             pi_test_on(vmx->nested.pi_desc))
>                 kvm_apic_set_irr(vcpu,
>                         vmx->nested.posted_intr_nv);
> }
> 
> Then we will get an nested-vmexit in vmx_check_nested_events, that
> posted intr will be handled by L1 immediately.
> This mechanism will also emulate the hardware's behavior: If a posted
> intr was not accomplished by hardware, we will get an interrupt with
> POSTED_INTR_NV.

Yes.

> Would this be better?

I think you do not even need a new bit.  You can use KVM_REQ_EVENT and
(to complete my suggestion, which was not enough) do the above in
vmx_check_nested_events.

Paolo