Re: 2 CPU Conformance Issue in KVM/x86

Paolo Bonzini
2015-03-09T19:38:56Z

On 09/03/2015 20:19, Avi Kivity wrote:
> I can't think of one with reasonable performance either. Perhaps the
> maintainers could raise the issue with Intel. It looks academic but it
> can happen in real life -- KVM for example used to rely on reserved bits
> faults (it set all bits in the PTE so it wouldn't have been caught by
> this).

Yes, and it checked that MAXPHYADDR != 52 before. If you want to set
only one bit, making that bit 51 makes sense anyway for simplicity, so
it is still 99.9% academic. Once processors appear with MAXPHYADDR =
52, the remaining 0.1% will become more relevant.

The current limit is IIRC 46 or 48 (on Haswell Xeons).

Paolo