From mboxrd@z Thu Jan 1 00:00:00 1970 From: Leon Alrae Subject: Re: [PATCH 3/9] mips/kvm: Implement PRid CP0 register Date: Thu, 12 Mar 2015 16:36:12 +0000 Message-ID: <5501C07C.9050909@imgtec.com> References: <1426087371-16166-1-git-send-email-james.hogan@imgtec.com> <1426087371-16166-4-git-send-email-james.hogan@imgtec.com> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1" Content-Transfer-Encoding: 7bit Cc: , Aurelien Jarno To: James Hogan , , Paolo Bonzini Return-path: Received: from mailapp01.imgtec.com ([195.59.15.196]:41301 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964829AbbCLQgO (ORCPT ); Thu, 12 Mar 2015 12:36:14 -0400 In-Reply-To: <1426087371-16166-4-git-send-email-james.hogan@imgtec.com> Sender: kvm-owner@vger.kernel.org List-ID: On 11/03/2015 15:22, James Hogan wrote: > Implement saving and restoring to KVM state of the Processor ID (PRid) > CP0 register. This allows QEMU to control the PRid exposed to the guest > instead of using the default set by KVM. > > Signed-off-by: James Hogan > Cc: Paolo Bonzini > Cc: Leon Alrae > Cc: Aurelien Jarno > --- > target-mips/kvm.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) Reviewed-by: Leon Alrae