From mboxrd@z Thu Jan 1 00:00:00 1970 From: James Sullivan Subject: Re: [Patch v5] x86: irq_comm: Add check for RH bit in kvm_set_msi_irq Date: Tue, 24 Mar 2015 08:17:34 -0600 Message-ID: <551171FE.1070701@gmail.com> References: <20150318225225.GA8702@amt.cnet> <550A1F6A.6030602@gmail.com> <20150319010932.GA18338@amt.cnet> <20150319130015.GA16070@potion.brq.redhat.com> <550B5309.1090805@gmail.com> <20150320151534.GB14772@potion.brq.redhat.com> <550C3B23.30401@gmail.com> <550C5DD7.5050306@gmail.com> <20150323211331.GA21710@potion.brq.redhat.com> <551097AF.4000303@gmail.com> <20150324140301.GD21522@potion.brq.redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: Marcelo Tosatti , kvm@vger.kernel.org, gleb@kernel.org, pbonzini@redhat.com To: =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= Return-path: Received: from mail-pd0-f171.google.com ([209.85.192.171]:36678 "EHLO mail-pd0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752248AbbCXOTs (ORCPT ); Tue, 24 Mar 2015 10:19:48 -0400 Received: by pdbcz9 with SMTP id cz9so222611464pdb.3 for ; Tue, 24 Mar 2015 07:19:48 -0700 (PDT) In-Reply-To: <20150324140301.GD21522@potion.brq.redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 03/24/2015 08:03 AM, Radim Kr=C4=8Dm=C3=A1=C5=99 wrote: > 2015-03-23 16:46-0600, James Sullivan: >> On 03/23/2015 03:13 PM, Radim Kr=C4=8Dm=C3=A1=C5=99 wrote: >>> I meant if the delivery mode from data register isn't ignored with = RH=3D1, >>> and the message delivered as if lowest-priority was set there. >>> (Decided by having something else than fixed or lowest-priority the= re.) >>> >> >> Hmm, any thoughts on how I could test for that? >=20 > Set the MSI data register's delivery mode to NMI/SMI/... > The change below fails =3D> hardware honors delivery mode. >=20 > I tested it and Linux got a lot of unexpected NMIs, so the emulation = in > your latest patch looks correct. >=20 > diff --git a/arch/x86/include/asm/msidef.h b/arch/x86/include/asm/msi= def.h > index 4cc48af23fef..2270e459186b 100644 > --- a/arch/x86/include/asm/msidef.h > +++ b/arch/x86/include/asm/msidef.h > @@ -17,6 +17,7 @@ > #define MSI_DATA_DELIVERY_MODE_SHIFT 8 > #define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT) > #define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT= ) > +#define MSI_DATA_DELIVERY_NMI (4 << MSI_DATA_DELIVERY_MODE_SHIFT) > =20 > #define MSI_DATA_LEVEL_SHIFT 14 > #define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT) > diff --git a/arch/x86/kernel/apic/msi.c b/arch/x86/kernel/apic/msi.c > index d6ba2d660dc5..4f71737c34eb 100644 > --- a/arch/x86/kernel/apic/msi.c > +++ b/arch/x86/kernel/apic/msi.c > @@ -46,7 +46,7 @@ void native_compose_msi_msg(struct pci_dev *pdev, > MSI_DATA_LEVEL_ASSERT | > ((apic->irq_delivery_mode !=3D dest_LowestPrio) ? > MSI_DATA_DELIVERY_FIXED : > - MSI_DATA_DELIVERY_LOWPRI) | > + MSI_DATA_DELIVERY_NMI) | > MSI_DATA_VECTOR(cfg->vector); > } > =20 >=20 Great, thanks.