From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [PATCH v2] KVM: SVM: Sync g_pat with guest-written PAT value Date: Tue, 21 Apr 2015 13:09:48 +0200 Message-ID: <55362FFC.1040905@redhat.com> References: <552B5128.4010909@siemens.com> <552B6923.3020602@siemens.com> <20150420161401.GB26491@potion.brq.redhat.com> <5535368B.9060408@siemens.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Cc: =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= , kvm , Joel Schopp To: Jan Kiszka Return-path: Received: from mail-wi0-f176.google.com ([209.85.212.176]:34645 "EHLO mail-wi0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750937AbbDULJx (ORCPT ); Tue, 21 Apr 2015 07:09:53 -0400 Received: by wicmx19 with SMTP id mx19so61178081wic.1 for ; Tue, 21 Apr 2015 04:09:52 -0700 (PDT) In-Reply-To: <5535368B.9060408@siemens.com> Sender: kvm-owner@vger.kernel.org List-ID: On 20/04/2015 19:25, Jan Kiszka wrote: > When hardware supports the g_pat VMCB field, we can use it for emulating > the PAT configuration that the guest configures by writing to the > corresponding MSR. > > Signed-off-by: Jan Kiszka I'm not sure about this. The problem is that, unlike Intel, AMD has no way for the host to force its PAT value and ignore the guest's. I'm worried about potential performance problems in the guest. This is not as bad as on ARM, because the guest cannot disable the cache snooping protocol and thus cache coherency is guaranteed (see tables 7-10 and 15-20 in the AMD docs), but still I think I'd prefer having some knob (module parameter) to enable/disable gPAT. It's okay to make it enabled by default. Paolo > --- > > Changes in v2: > - add mark_dirty as found missing by Radim > > arch/x86/kvm/svm.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c > index ce741b8..68fdddc 100644 > --- a/arch/x86/kvm/svm.c > +++ b/arch/x86/kvm/svm.c > @@ -3245,6 +3245,16 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) > case MSR_VM_IGNNE: > vcpu_unimpl(vcpu, "unimplemented wrmsr: 0x%x data 0x%llx\n", ecx, data); > break; > + case MSR_IA32_CR_PAT: > + if (npt_enabled) { > + if (!kvm_mtrr_valid(vcpu, MSR_IA32_CR_PAT, data)) > + return 1; > + svm->vmcb->save.g_pat = data; > + mark_dirty(svm->vmcb, VMCB_NPT); > + vcpu->arch.pat = data; > + break; > + } > + /* fall through */ > default: > return kvm_set_msr_common(vcpu, msr); > }