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From: Paolo Bonzini <pbonzini@redhat.com>
To: "Wu, Feng" <feng.wu@intel.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Cc: Steve Rutherford <srutherford@google.com>,
	"rkrcmar@redhat.com" <rkrcmar@redhat.com>
Subject: Re: [PATCH 8/9] KVM: x86: Add EOI exit bitmap inference
Date: Fri, 7 Aug 2015 12:16:30 +0200	[thread overview]
Message-ID: <55C4857E.5040306@redhat.com> (raw)
In-Reply-To: <E959C4978C3B6342920538CF579893F00267AEB0@SHSMSX104.ccr.corp.intel.com>



On 07/08/2015 09:46, Wu, Feng wrote:
> If I understand it correctly, here you reserve the low part of the routing
> table, and insert entries with KVM_IRQ_ROUTING_MSI type in them,
> then you use this as a hint to KVM to set the EOI bit map. I have two
> concerns:
> 
> - Currently, GSI 2 is used for MSI routing, I want to make sure after this
> patch, whether GSI 2 can still be used for _real_ MSI routing, if it can,
> does everything work correctly?

The patch has no effect if you use the in-kernel IOAPIC.  If you use a
userspace IOAPIC you won't be able to use GSI 2 for MSI routing because
it falls in the reserved range.

> - Now, KVM_IRQ_ROUTING_MSI and KVM_IRQ_ROUTING_IRQCHIP
> type entries cannot share the same map[gsi] (pls refer to the following
> code), so where should be the IOAPIC entries exist in the map[] array?

With split irqchip, only KVM_IRQ_ROUTING_MSI is used.  Does this answer
your question?

Paolo

> static int setup_routing_entry(struct kvm_irq_routing_table *rt,
>                                struct kvm_kernel_irq_routing_entry *e,
>                                const struct kvm_irq_routing_entry *ue)
> {
> 
> 		......
> 
>         /*
>          * Do not allow GSI to be mapped to the same irqchip more than once.
>          * Allow only one to one mapping between GSI and MSI.
>          */
>         hlist_for_each_entry(ei, &rt->map[ue->gsi], link)
>                 if (ei->type == KVM_IRQ_ROUTING_MSI ||
>                     ue->type == KVM_IRQ_ROUTING_MSI ||
>                     ue->u.irqchip.irqchip == ei->irqchip.irqchip)
>                         return r;
> 
> 		......
> }

  reply	other threads:[~2015-08-07 10:16 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-05 15:23 [PATCH 0/9] split irqchip series Paolo Bonzini
2015-08-05 15:23 ` [PATCH 1/9] KVM: x86: set TMR when the interrupt is accepted Paolo Bonzini
2015-08-05 15:23 ` [PATCH 2/9] KVM: x86: store IOAPIC-handled vectors in each VCPU Paolo Bonzini
2015-08-05 15:23 ` [PATCH 3/9] KVM: x86: replace vm_has_apicv hook with cpu_uses_apicv Paolo Bonzini
2015-08-05 15:23 ` [PATCH 4/9] KVM: x86: introduce lapic_in_kernel Paolo Bonzini
2015-08-05 15:23 ` [PATCH 5/9] KVM: x86: unify handling of interrupt window Paolo Bonzini
2015-08-06  6:50   ` Wu, Feng
2015-08-06 11:55     ` Paolo Bonzini
2015-08-05 15:23 ` [PATCH 6/9] KVM: x86: Split the APIC from the rest of IRQCHIP Paolo Bonzini
2015-08-05 15:23 ` [PATCH 7/9] KVM: x86: Add KVM exit for IOAPIC EOIs Paolo Bonzini
2015-08-05 15:23 ` [PATCH 8/9] KVM: x86: Add EOI exit bitmap inference Paolo Bonzini
2015-08-07  5:43   ` Wu, Feng
2015-08-07  7:32     ` Paolo Bonzini
2015-08-07  7:46   ` Wu, Feng
2015-08-07 10:16     ` Paolo Bonzini [this message]
2015-08-07 22:55       ` Wu, Feng
2015-08-05 15:23 ` [PATCH 9/9] KVM: x86: Add support for local interrupt requests from userspace Paolo Bonzini

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