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From: Yang Zhang <yang.zhang.wz@gmail.com>
To: "Wu, Feng" <feng.wu@intel.com>,
	"pbonzini@redhat.com" <pbonzini@redhat.com>,
	"rkrcmar@redhat.com" <rkrcmar@redhat.com>
Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Jiang Liu (jiang.liu@linux.intel.com)"
	<jiang.liu@linux.intel.com>
Subject: Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts
Date: Tue, 22 Dec 2015 15:13:32 +0800	[thread overview]
Message-ID: <5678F81C.5050309@gmail.com> (raw)
In-Reply-To: <E959C4978C3B6342920538CF579893F00AF0655A@SHSMSX104.ccr.corp.intel.com>

On 2015/12/22 14:59, Wu, Feng wrote:
>
>
>> -----Original Message-----
>> From: Yang Zhang [mailto:yang.zhang.wz@gmail.com]
>> Sent: Tuesday, December 22, 2015 2:49 PM
>> To: Wu, Feng <feng.wu@intel.com>; pbonzini@redhat.com;
>> rkrcmar@redhat.com
>> Cc: kvm@vger.kernel.org; linux-kernel@vger.kernel.org; Jiang Liu
>> (jiang.liu@linux.intel.com) <jiang.liu@linux.intel.com>
>> Subject: Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-
>> priority interrupts
>>
>>>>>>
>>>>>> On 2015/12/16 9:37, Feng Wu wrote:
>>>>>>> Use vector-hashing to deliver lowest-priority interrupts, As an
>>>>>>> example, modern Intel CPUs in server platform use this method to
>>>>>>> handle lowest-priority interrupts.
>>>>>>>
>>>>>>> Signed-off-by: Feng Wu <feng.wu@intel.com>
>>>>>>> ---
>>>>>>>      arch/x86/kvm/irq_comm.c | 27 ++++++++++++++++++-----
>>>>>>>      arch/x86/kvm/lapic.c    | 57
>>>>>> ++++++++++++++++++++++++++++++++++++++++---------
>>>>>>>      arch/x86/kvm/lapic.h    |  2 ++
>>>>>>>      arch/x86/kvm/x86.c      |  9 ++++++++
>>>>>>>      arch/x86/kvm/x86.h      |  1 +
>>>>>>>      5 files changed, 81 insertions(+), 15 deletions(-)
>>>>>>>
>>>>>>>      bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic
>>>> *src,
>>>>>>>      		struct kvm_lapic_irq *irq, int *r, unsigned long
>> *dest_map)
>>>>>>>      {
>>>>>>> @@ -731,17 +747,38 @@ bool kvm_irq_delivery_to_apic_fast(struct kvm
>>>>>> *kvm, struct kvm_lapic *src,
>>>>>>>      		dst = map->logical_map[cid];
>>>>>>>
>>>>>>>      		if (kvm_lowest_prio_delivery(irq)) {
>>>>>>> -			int l = -1;
>>>>>>> -			for_each_set_bit(i, &bitmap, 16) {
>>>>>>> -				if (!dst[i])
>>>>>>> -					continue;
>>>>>>> -				if (l < 0)
>>>>>>> -					l = i;
>>>>>>> -				else if (kvm_apic_compare_prio(dst[i]->vcpu,
>>>>>> dst[l]->vcpu) < 0)
>>>>>>> -					l = i;
>>>>>>> +			if (!kvm_vector_hashing_enabled()) {
>>>>>>> +				int l = -1;
>>>>>>> +				for_each_set_bit(i, &bitmap, 16) {
>>>>>>> +					if (!dst[i])
>>>>>>> +						continue;
>>>>>>> +					if (l < 0)
>>>>>>> +						l = i;
>>>>>>> +					else if (kvm_apic_compare_prio(dst[i]-
>>>>>>> vcpu, dst[l]->vcpu) < 0)
>>>>>>> +						l = i;
>>>>>>> +				}
>>>>>>> +				bitmap = (l >= 0) ? 1 << l : 0;
>>>>>>> +			} else {
>>>>>>> +				int idx = 0;
>>>>>>> +				unsigned int dest_vcpus = 0;
>>>>>>> +
>>>>>>> +				for_each_set_bit(i, &bitmap, 16) {
>>>>>>> +					if (!dst[i]
>>>>>> && !kvm_lapic_enabled(dst[i]->vcpu)) {
>>>>>>
>>>>>> It should be or(||) not and (&&).
>>>>>
>>>>> Oh, you are right! My negligence! Thanks for pointing this out, Yang!
>>>>
>>>> btw, i think the kvm_lapic_enabled check is wrong here? Why need it here?
>>>
>>> If the lapic is not enabled, I think we cannot recognize it as a candidate, can
>> we?
>>> Maybe Radim can confirm this, Radim, what is your option?
>>
>> Lapic can be disable by hw or sw. Here we only need to check the hw is
>> enough which is already covered while injecting the interrupt into
>> guest. I remember we(Glab, Macelo and me) have discussed it several ago,
>> but i cannot find the mail thread.
>
> But if the lapic is disabled by software, we cannot still inject interrupts to
> it, can we?

Yes, We cannot inject the normal interrupt. But this already covered by 
current logic and add a check here seems meaningless. Conversely, it may 
do bad thing..

-- 
best regards
yang

  reply	other threads:[~2015-12-22  7:13 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-16  1:37 [PATCH v2 0/2] Add vector-hashing support for lowest-priority interrupts delivery Feng Wu
2015-12-16  1:37 ` [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-priority interrupts Feng Wu
2015-12-21  1:46   ` Yang Zhang
2015-12-21  1:50     ` Wu, Feng
2015-12-21  2:06       ` Yang Zhang
2015-12-22  4:37         ` Wu, Feng
2015-12-22  6:49           ` Yang Zhang
2015-12-22  6:59             ` Wu, Feng
2015-12-22  7:13               ` Yang Zhang [this message]
2015-12-22  7:19                 ` Wu, Feng
2015-12-22 19:52                   ` rkrcmar
2015-12-23  2:12                     ` Wu, Feng
2015-12-23 16:42                       ` rkrcmar
2015-12-23  3:17                     ` Yang Zhang
2015-12-23 17:19   ` Radim Krčmář
2016-01-18  5:19     ` Wu, Feng
2016-01-18 10:41       ` Paolo Bonzini
2016-01-19  4:44         ` Wu, Feng
2016-01-19 13:42           ` Paolo Bonzini
2016-01-19 13:49             ` Wu, Feng
2016-01-18 14:00       ` Radim Krcmár
2015-12-16  1:37 ` [PATCH v2 2/2] KVM: x86: Add lowest-priority support for vt-d posted-interrupts Feng Wu
2015-12-21  1:50   ` Yang Zhang
2015-12-21  1:55     ` Wu, Feng
2015-12-21  2:01       ` Yang Zhang
2015-12-22  4:36         ` Wu, Feng
2015-12-22  6:42           ` Yang Zhang
2015-12-23 16:50             ` rkrcmar
2015-12-23 17:21   ` Radim Krčmář
2016-01-04  1:57     ` Wu, Feng

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