From: Marc Zyngier <marc.zyngier@arm.com>
To: Julien Grall <julien.grall@arm.com>,
Christoffer Dall <christoffer.dall@linaro.org>
Cc: al.stone@linaro.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, fu.wei@linaro.org,
Thomas Gleixner <tglx@linutronix.de>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org,
Jason Cooper <jason@lakedaemon.net>
Subject: Re: [PATCH 3/5] irqchip/gic-v2: Parse and export virtual GIC information
Date: Wed, 10 Feb 2016 14:46:02 +0000 [thread overview]
Message-ID: <56BB4D2A.1030903@arm.com> (raw)
In-Reply-To: <56BB46DC.7080202@arm.com>
On 10/02/16 14:19, Julien Grall wrote:
> Hi Christoffer,
>
> On 09/02/16 20:49, Christoffer Dall wrote:
>>> +static void __init gic_acpi_setup_kvm_info(void)
>>> +{
>>> + gic_v2_kvm_info.type = GIC_V2;
>>> +
>>> + gic_v2_kvm_info.maint_irq = acpi_register_gsi(NULL,
>>> + acpi_data.maint_irq,
>>> + acpi_data.maint_irq_mode,
>>> + ACPI_ACTIVE_HIGH);
>>> + gic_v2_kvm_info.vctrl_base = acpi_data.vctrl_base;
>>> + if (gic_v2_kvm_info.vctrl_base)
>>> + gic_v2_kvm_info.vctrl_size = SZ_8K;
>>> +
>>> + gic_v2_kvm_info.vcpu_base = acpi_data.vcpu_base;
>>> + if (gic_v2_kvm_info.vcpu_base)
>>> + gic_v2_kvm_info.vcpu_size = SZ_8K;
>>
>> why are the sizes hard-coded to 8K in this case?
>
> The MADT only provides the base addresses and not the size. The default
> value has been chosen based on the GICv2 spec (ARM IHI 0048B.b)
> * GICV: See 5.5
> * GICH: I can't find again the section about it. But the example
> bindings in
> Documents/devicetree/bindings/interrupt-controller/arm,gic.txt uses 8K.
>
> I will add a comment in the code explaining where the 8K come from.
The GICH size can be found in the GIC400 TRM:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0471b/CHDBJDCB.html
The first 4kB are banked per CPU, while the next 4kB are exposing all
CPUs, each in a 512 bytes window. We don't give a damn about the second
page, but hey, it is there...
Of course, this is GIC400, not the architecture spec. So maybe
considering a 4kB size would be better, just in case someone is
braindead enough to produce another GICv2 implementation without the
aliases...
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2016-02-10 14:46 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-08 16:47 [PATCH 0/5] arm64: Add support of KVM with ACPI Julien Grall
2016-02-08 16:47 ` [PATCH 1/5] KVM: arm/arm64: arch_timer: Gather KVM specific information in a structure Julien Grall
2016-02-08 16:47 ` [PATCH 2/5] KVM: arm/arm64: arch_timer: Rely on the arch timer to parse the firmware tables Julien Grall
2016-02-08 16:47 ` [PATCH 3/5] irqchip/gic-v2: Parse and export virtual GIC information Julien Grall
2016-02-08 18:30 ` Marc Zyngier
2016-02-09 11:23 ` Julien Grall
2016-02-09 11:31 ` Marc Zyngier
2016-02-09 20:49 ` Christoffer Dall
2016-02-09 21:57 ` Wei Huang
2016-02-10 14:19 ` Julien Grall
2016-02-10 14:46 ` Marc Zyngier [this message]
2016-02-10 15:22 ` Julien Grall
2016-02-08 16:47 ` [PATCH 4/5] irqchip/gic-v3: " Julien Grall
2016-02-08 16:47 ` [PATCH 5/5] KVM: arm/arm64: vgic: Rely on the GIC driver to parse the firmware tables Julien Grall
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