From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [kvm-unit-tests PATCH] x86: vmx: fix definition of X86_CR4_VMXE Date: Tue, 23 Feb 2016 13:14:54 +0100 Message-ID: <56CC4D3E.906@redhat.com> References: <1456184436-31168-1-git-send-email-pfeiner@google.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit To: Peter Feiner , kvm@vger.kernel.org, drjones@redhat.com Return-path: Received: from mail-wm0-f54.google.com ([74.125.82.54]:37066 "EHLO mail-wm0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750737AbcBWMO6 (ORCPT ); Tue, 23 Feb 2016 07:14:58 -0500 Received: by mail-wm0-f54.google.com with SMTP id g62so207154574wme.0 for ; Tue, 23 Feb 2016 04:14:57 -0800 (PST) In-Reply-To: <1456184436-31168-1-git-send-email-pfeiner@google.com> Sender: kvm-owner@vger.kernel.org List-ID: On 23/02/2016 00:40, Peter Feiner wrote: > Was defined as 0x1 when it should have been 0x2000 (13th bit of CR4). > See Intel manual 23.7. 0x1 is the VME 'Virtual-8086 Mode Extensions' > bit, which the vmx tests don't exercise. > > The correct bit was being set thanks to IA32_VMX_CR4_FIXED{0,1} MSRs > forcing it. > > I hacked the test setup to forcibly un-set the bit and observed the > correct #UD VMXON behavior. Adding a test to verify the #UD behavior > is follow-up work. > > Signed-off-by: Peter Feiner > --- > lib/x86/processor.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/lib/x86/processor.h b/lib/x86/processor.h > index 95cea1a..dff1689 100644 > --- a/lib/x86/processor.h > +++ b/lib/x86/processor.h > @@ -21,7 +21,7 @@ > #define X86_CR0_WP 0x00010000 > #define X86_CR0_AM 0x00040000 > #define X86_CR0_PG 0x80000000 > -#define X86_CR4_VMXE 0x00000001 > +#define X86_CR4_VMXE 0x00002000 > #define X86_CR4_TSD 0x00000004 > #define X86_CR4_DE 0x00000008 > #define X86_CR4_PSE 0x00000010 > Thanks, applying both patches. Paolo