From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [kvm-unit-tests v2 4/8] x86: eventinj: make test work with -O0 Date: Thu, 3 Mar 2016 13:53:00 +0100 Message-ID: <56D833AC.4010508@redhat.com> References: <1456867658-10937-1-git-send-email-pfeiner@google.com> <1456967378-6367-1-git-send-email-pfeiner@google.com> <1456967378-6367-5-git-send-email-pfeiner@google.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit To: Peter Feiner , kvm@vger.kernel.org, drjones@redhat.com Return-path: Received: from mx1.redhat.com ([209.132.183.28]:53358 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751427AbcCCMxE (ORCPT ); Thu, 3 Mar 2016 07:53:04 -0500 In-Reply-To: <1456967378-6367-5-git-send-email-pfeiner@google.com> Sender: kvm-owner@vger.kernel.org List-ID: On 03/03/2016 02:09, Peter Feiner wrote: > With optimizations disabled, the compiler generated a call for > irq_enable() -- rather than just inlining an sti instruction as > expected. Thus the irq_enable ret would run in the sti shadow and the > vectors would fire in the wrong order. > > Signed-off-by: Peter Feiner > --- > x86/eventinj.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/x86/eventinj.c b/x86/eventinj.c > index bddedce..202ac19 100644 > --- a/x86/eventinj.c > +++ b/x86/eventinj.c > @@ -296,8 +296,7 @@ int main() > apic_self_ipi(32); > flush_stack(); > io_delay(); > - irq_enable(); > - asm volatile ("int $33"); > + asm volatile ("sti; int $33"); > irq_disable(); > printf("After vec 32 and int $33\n"); > report("vec 32/int $33", test_count == 2); > I've added a comment to irq_enable too: /* Note that irq_enable() does not ensure an interrupt shadow due * to the vagaries of compiler optimizations. If you need the * shadow, use a single asm with "sti" and the instruction after it. */ Paolo