From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: [kvm-unit-tests PATCH] powerpc/spapr_hcall: Fix assembler constraints of the h_random h-call Date: Thu, 3 Mar 2016 13:58:48 +0100 Message-ID: <56D83508.1000900@redhat.com> References: <1457004188-17186-1-git-send-email-thuth@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Cc: dgibson@redhat.com, lvivier@redhat.com To: Thomas Huth , kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, drjones@redhat.com Return-path: Received: from mx1.redhat.com ([209.132.183.28]:47620 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754660AbcCCM6w (ORCPT ); Thu, 3 Mar 2016 07:58:52 -0500 In-Reply-To: <1457004188-17186-1-git-send-email-thuth@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 03/03/2016 12:23, Thomas Huth wrote: > As noted by Laurent Vivier, a register that is marked with "+r" as > input and output is not required to be listed in the set of input > registers anymore. > And as noted by David Gibson, the sPAPR hypercall is also allowed to > clobber a bunch of other registers. According to the LoPAPR spec, > r0 and r3-r12, CTR, XER and CC registers are volatile, so we should > mark them in the clobber list. > > Signed-off-by: Thomas Huth > --- > powerpc/spapr_hcall.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/powerpc/spapr_hcall.c b/powerpc/spapr_hcall.c > index 46731e1..dbff630 100644 > --- a/powerpc/spapr_hcall.c > +++ b/powerpc/spapr_hcall.c > @@ -96,7 +96,9 @@ static int h_random(uint64_t *val) > register uint64_t r3 asm("r3") = H_RANDOM; > register uint64_t r4 asm("r4"); > > - asm volatile (" sc 1 " : "+r"(r3), "=r"(r4) : "r"(r3)); > + asm volatile (" sc 1 " : "+r"(r3), "=r"(r4) : > + : "r0", "r5", "r6", "r7", "r8", "r9", "r10", > + "r11", "r12", "xer", "ctr", "cc"); > *val = r4; > > return r3; > Applied, thanks. Paolo