From mboxrd@z Thu Jan  1 00:00:00 1970
From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Subject: Re: [PART1 RFC v3 12/12] svm: Manage vcpu load/unload when enable
 AVIC
Date: Thu, 31 Mar 2016 15:52:38 +0700
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Hi Radim,

On 03/19/2016 04:44 AM, Radim Kr=C4=8Dm=C3=A1=C5=99 wrote:
> 2016-03-18 01:09-0500, Suravee Suthikulpanit:
>> From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
>> +
>> +		WRITE_ONCE(*entry, new_entry);
>
> This will translate to two writes in 32 bit mode and we need to write
> physical ID first to avoid spurious doorbells ...
> is the order guaranteed?

Hm.. not sure on that.

>> +	} else {
>> +		new_entry =3D READ_ONCE(*entry);
>> +		/**
>> +		 * This handles the case when vcpu is scheduled out
>> +		 * and has not yet not called blocking. We save the
>> +		 * AVIC running flag so that we can restore later.
>> +		 */
>
> is_running must be disabled in between ...blocking and ...unblocking,
> because we don't want to miss interrupts and block forever.
> I somehow don't get it from the comment. :)

Not sure if I understand your concern.  However, the is_running bit=20
setting/clearing should be handled in the avic_set_running below. This=20
part only handles othe case when the is_running bit still set when=20
calling vcpu_put (and later on loading some other vcpus). This way, whe=
n=20
we are re-loading this vcpu, we can restore the is_running bit accordin=
gly.

Thanks,
Suravee