From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
To: Paolo Bonzini <pbonzini@redhat.com>, <rkrcmar@redhat.com>,
<joro@8bytes.org>, <bp@alien8.de>, <gleb@kernel.org>,
<alex.williamson@redhat.com>
Cc: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<wei@redhat.com>, <sherry.hurwitz@amd.com>
Subject: Re: [PART1 RFC v3 07/12] svm: Add interrupt injection via AVIC
Date: Tue, 5 Apr 2016 22:56:39 +0700 [thread overview]
Message-ID: <5703E037.5050509@amd.com> (raw)
In-Reply-To: <5703BD1D.1070604@amd.com>
Hi Paolo,
On 4/5/16 20:26, Suravee Suthikulpanit wrote:
>>> @@ -2877,8 +2895,10 @@ static int clgi_interception(struct vcpu_svm
>>> *svm)
>>> disable_gif(svm);
>>>
>>> /* After a CLGI no interrupts should come */
>>> - svm_clear_vintr(svm);
>>> - svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
>>> + if (!svm_vcpu_avic_enabled(svm)) {
>>> + svm_clear_vintr(svm);
>>> + svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
>>> + }
>>
>> This is for nested virtualization. Unless you support nested AVIC, the
>> L2 guest should run without AVIC (i.e. IsRunning should be false) and
>> use the old VINTR mechanism.
>
> I see. I am not planning to supported nested AVIC at the L2 level for
> the moment. If it is alright, I would like to get the basic AVIC and
> IOMMU in first (unless you have a different opinion).
>
> In that case, I think I should also make sure to not expose AVIC CPUID
> to the guest VM.
Actually, it should have already not set the AVIC CPUID in the L1 guest.
Thanks,
Suravee
next prev parent reply other threads:[~2016-04-05 15:57 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-18 6:09 [PART1 RFC v3 00/12] KVM: x86: Introduce SVM AVIC support Suravee Suthikulpanit
2016-03-18 6:09 ` [PART1 RFC v3 01/12] KVM: x86: Misc LAPIC changes to expose helper functions Suravee Suthikulpanit
2016-03-18 11:16 ` Paolo Bonzini
2016-03-18 6:09 ` [PART1 RFC v3 02/12] KVM: x86: Introducing kvm_x86_ops VM init/uninit hooks Suravee Suthikulpanit
2016-03-18 10:11 ` Paolo Bonzini
2016-03-29 5:27 ` Suravee Suthikulpanit
2016-03-29 10:21 ` Paolo Bonzini
2016-03-29 11:47 ` Suravee Suthikulpanit
2016-03-30 10:00 ` Suravee Suthikulpanit
2016-03-30 12:07 ` Paolo Bonzini
2016-03-30 12:18 ` Suravee Suthikulpanit
2016-03-18 6:09 ` [PART1 RFC v3 03/12] KVM: x86: Introducing kvm_x86_ops VCPU blocking/unblocking hooks Suravee Suthikulpanit
2016-03-18 10:11 ` Paolo Bonzini
2016-03-18 6:09 ` [PART1 RFC v3 04/12] KVM: split kvm_vcpu_wake_up from kvm_vcpu_kick Suravee Suthikulpanit
2016-03-18 10:11 ` Paolo Bonzini
2016-03-18 6:09 ` [PART1 RFC v3 05/12] svm: Introduce new AVIC VMCB registers Suravee Suthikulpanit
2016-03-18 10:11 ` Paolo Bonzini
2016-03-18 6:09 ` [PART1 RFC v3 06/12] KVM: x86: Detect and Initialize AVIC support Suravee Suthikulpanit
2016-03-18 11:21 ` Paolo Bonzini
2016-03-18 6:09 ` [PART1 RFC v3 07/12] svm: Add interrupt injection via AVIC Suravee Suthikulpanit
2016-03-18 10:22 ` Paolo Bonzini
2016-04-05 13:26 ` Suravee Suthikulpanit
2016-04-05 15:56 ` Suravee Suthikulpanit [this message]
2016-03-18 6:09 ` [PART1 RFC v3 08/12] KVM: x86: Add trace events for AVIC Suravee Suthikulpanit
2016-03-18 10:24 ` Paolo Bonzini
2016-03-28 11:27 ` Suravee Suthikulpanit
2016-03-18 6:09 ` [PART1 RFC v3 09/12] svm: Add VMEXIT handlers " Suravee Suthikulpanit
2016-03-18 11:11 ` Paolo Bonzini
2016-03-18 6:09 ` [PART1 RFC v3 10/12] svm: Do not expose x2APIC when enable AVIC Suravee Suthikulpanit
2016-03-18 20:59 ` Radim Krčmář
2016-03-31 4:15 ` Suravee Suthikulpanit
2016-03-31 11:23 ` Paolo Bonzini
2016-04-05 10:14 ` Suravee Suthikulpanit
2016-03-18 6:09 ` [PART1 RFC v3 11/12] svm: Do not intercept CR8 " Suravee Suthikulpanit
2016-03-18 21:10 ` Radim Krčmář
2016-03-30 12:15 ` Suravee Suthikulpanit
2016-03-18 6:09 ` [PART1 RFC v3 12/12] svm: Manage vcpu load/unload " Suravee Suthikulpanit
2016-03-18 21:44 ` Radim Krčmář
2016-03-31 8:52 ` Suravee Suthikulpanit
2016-03-31 14:19 ` Radim Krčmář
2016-04-05 10:07 ` Suravee Suthikulpanit
2016-04-05 14:56 ` Radim Krčmář
2016-04-06 3:40 ` Suravee Suthikulpanit
2016-04-06 12:36 ` Radim Krčmář
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5703E037.5050509@amd.com \
--to=suravee.suthikulpanit@amd.com \
--cc=alex.williamson@redhat.com \
--cc=bp@alien8.de \
--cc=gleb@kernel.org \
--cc=joro@8bytes.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=rkrcmar@redhat.com \
--cc=sherry.hurwitz@amd.com \
--cc=wei@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).