From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Huth Subject: Re: [PATCH RFC 12/15] Factor out generic architecture code Date: Thu, 14 Apr 2016 09:50:38 +0200 Message-ID: <570F4BCE.1020008@redhat.com> References: <8a0723604a705e6c24f5cc5c062743236d7a4c70.1460190352.git.agordeev@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Cc: Andrew Jones To: Alexander Gordeev , kvm@vger.kernel.org Return-path: Received: from mx1.redhat.com ([209.132.183.28]:38867 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753444AbcDNHur (ORCPT ); Thu, 14 Apr 2016 03:50:47 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B3D3947049 for ; Thu, 14 Apr 2016 07:50:41 +0000 (UTC) In-Reply-To: <8a0723604a705e6c24f5cc5c062743236d7a4c70.1460190352.git.agordeev@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 11.04.2016 13:04, Alexander Gordeev wrote: > This rework is a prerequisite for the forthcoming pci-testdev > implementation. Basically, only generic port IO accessors are > needed, but it turned out touching io/smp/mm files is needed. > This update should likely be more comprehensive and split into > several commits. > > Cc: Thomas Huth > Cc: Andrew Jones > Signed-off-by: Alexander Gordeev > --- > lib/asm-generic/io.h | 55 ++++++++++++++++++++++++++++++++++++++++++++++++---- > lib/x86/asm/page.h | 1 + > lib/x86/io.h | 36 ++++++++++++++++++++++------------ > lib/x86/smp.h | 4 ---- > lib/x86/vm.c | 1 - > lib/x86/vm.h | 12 +----------- > x86/eventinj.c | 7 +------ > x86/kvmclock.c | 1 + > 8 files changed, 79 insertions(+), 38 deletions(-) > create mode 100644 lib/x86/asm/page.h > > diff --git a/lib/asm-generic/io.h b/lib/asm-generic/io.h > index 49283d6eb020..bd78f3586b9e 100644 > --- a/lib/asm-generic/io.h > +++ b/lib/asm-generic/io.h > @@ -127,6 +127,9 @@ static inline u64 __bswap64(u64 x) > ({ u64 __r = !__cpu_is_be() ? __bswap64(x) : ((u64)x); __r; }) > #define cpu_to_be64 be64_to_cpu > > +#ifndef mb > +#define mb() do { } while (0) > +#endif I think it would be better to at least use a asm volatile ("":::"memory") here to make sure that the compiler does not try to optimize memory access before and behind the barrier? Thomas