From: Andre Przywara <andre.przywara@arm.com>
To: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>,
linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Subject: Re: [RFC PATCH 06/45] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection
Date: Thu, 14 Apr 2016 14:45:49 +0100 [thread overview]
Message-ID: <570F9F0D.9020501@arm.com> (raw)
In-Reply-To: <20160414121506.GI30804@cbox>
Hi,
....
>>>>>> + if (irq->vcpu || !(irq->pending && irq->enabled) || !vcpu) {
>>>>>> + /*
>>>>>> + * If this IRQ is already on a VCPU's ap_list, then it
>>>>>> + * cannot be moved or modified and there is no more work for
>>>>>> + * us to do.
>>>>>> + *
>>>>>> + * Otherwise, if the irq is not pending and enabled, it does
>>>>>> + * not need to be inserted into an ap_list and there is also
>>>>>> + * no more work for us to do.
>>>>>> + */
>>>>>
>>>>> is the !vcpu check here not redundant because if you ever get to
>>>>> evaluating it, then irq->vcpu is null, and pending and enabled are set,
>>>>> which means the oracle couldn't have returned null, could it?
>>>>
>>>> In this case vcpu is always irq->target_vcpu, if I did the math
>>>> correctly. So can this be NULL?
>>>> Even if this is correct reasoning, I wonder if we optimize something
>>>> prematurely here and rely on the current implementation of
>>>> vgic_target_oracle(). I think the check for "!vcpu" is here to avoid a
>>>> NULL pointer deference below (in the first spin_lock after the retry:
>>>> label), so I'd rather keep this explicit check in here.
>>>
>>> I'm really not a fan of building the correctness of one of the most
>>> crucial parts of our code based on "let's add a few extra checks which
>>> may not be necessary, just in case" kind of logic.
>>>
>>> So let's be clear on why we have an if-statement here exactly:
>>>
>>> As the comment says, if we can't move the IRQ, because it's already
>>> assigned to somebody or if this IRQ is not pending or active, then it's
>>> shouldn't be queued.
>>>
>>> So the simple and all-encompassing check here is simply:
>>>
>>> if (irq->vcpu || !vcpu) {
>>> spin_unlock(&irq->irq_lock);
>>> return false;
>>> }
>>>
>>> The only requirement for this to be correct is that the MMIO handler for
>>> ISACTIVER to both set the active bit and the irq->vcpu pointer (and put
>>> it on the AP list), without calling this function...). That was my
>>> quesiton below.
>>>
>>> Because if that's not the case, you could end up here with irq->active
>>> set, but irq->vcpu == NULL and !(pending && enabled) and you'd error
>>> out, which means you would have to check explicitly for the active state
>>> here as well, but I think that just becomes too messy.
>>>
>>> So, just change this to what I propose and we can deal with the active
>>> state MMIO handler separately.
>>
>> I agree that setting the active state via MMIO is a mess in general and
>> stuffing this case into this function here gets hairy.
>> I am tempted to not support it in the first version, I guess it never
>> really worked reliably before ...
>
> I'm pretty sure it did, because we ran into migration breaking when this
> wasn't supported for the save/restore userspace interface.
Well, I was more concerned about the reliability part in there and all
the corner cases. Not sure if anyone actually tested this from within a
guest.
>>
>> At the moment I am trying to code this explicitly into the SACTIVER
>> handler and it's messy, too (because of the corner cases).
>> Let's see how this will look like ...
>
> ok.
>
> If you want, you can focus on getting a new version out, and I can take
> a stab at the SACTIVER together with the priority stuff. OTOH, if you
> already have something, then it may be worth following through with
> that.
Yeah, so by now I have something which doesn't look too bad. Copied your
style with many comments ;-)
I will now clean up the patches and try to send something out still
today. I think by now there are significantly enough changes to justify
a new revision, even if I haven't addressed every single bit of the
comments yet.
Cheers,
Andre.
P.S. There be dragons:
char device redirected to /dev/pts/0 (label serial0)
[ 193.035693] Kernel panic - not syncing: HYP panic:
....
Probably due to the ->nr_lr rework, about to investigate now.
>>
>>>>
>>>>> that would also explain why we don't have to re-check the same
>>>>> conditions below...
>>>>>
>>>>> or am I getting this wrong, because you could also have someone
>>>>> explicitly setting the IRQ to active via trapped MMIO, in which case we
>>>>> should be able to queue it without it being pending && enabled, which
>>>>> would indicate that it's the other way around, you should only evaluate
>>>>> !vcpu and kup the !(pending && enabled) part....?
>>>>
>>>> You lost me here, which hints at the fragility of this optimization ;-)
>>>>
>>>>>> + spin_unlock(&irq->irq_lock);
>>>>>> + return false;
>>>>>> + }
>>>>>> +
>>>>>> + /*
>>>>>> + * We must unlock the irq lock to take the ap_list_lock where
>>>>>> + * we are going to insert this new pending interrupt.
>>>>>> + */
>>>>>> + spin_unlock(&irq->irq_lock);
>>>>>> +
>>>>>> + /* someone can do stuff here, which we re-check below */
>>>>>> +retry:
>>>>>> + spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
>>>>>> + spin_lock(&irq->irq_lock);
>>>>>> +
>>>>>> + /*
>>>>>> + * Did something change behind our backs?
>>>>>> + *
>>>>>> + * There are two cases:
>>>>>> + * 1) The irq became pending or active behind our backs and/or
>>>>>> + * the irq->vcpu field was set correspondingly when putting
>>>>>> + * the irq on an ap_list. Then drop the locks and return.
>>>>>> + * 2) Someone changed the affinity on this irq behind our
>>>>>> + * backs and we are now holding the wrong ap_list_lock.
>>>>>> + * Then drop the locks and try the new VCPU.
>>>>>> + */
>>>>>> + if (irq->vcpu || !(irq->pending && irq->enabled)) {
>>>>>
>>>>> here I'm concerned about the active state again.
>>>>
>>>> Mmmh, can you elaborate and sketch a case where the active state would
>>>> cause trouble? This check is just here to avoid iterating on a no longer
>>>> pending or enabled IRQ. I wonder if an active IRQ can really sneak into
>>>> this function here in the first place?
>>>
>>> After having gone through the series I think we should deal with
>>> the active state queing directly in the vgic_mmio_write_sactive()
>>> function.
>>>
>>> But I still prefer to move the retry label to the very top of this
>>> function, and simplify these two statemtns to the condition I suggested:
>>>
>>> if (unlinkely(irq->vcpu || vcpu != vgic_target_oracle(irq)))
>>> goto retry;
>>>
>>> The cost is that we perform a few additional checks at runtime in the
>>> case where the IRQ was migrated while we released a lock (rare), but I
>>> think it simplifies the code.
>>
>> OK, I made this change. Also the shorter check after asking the oracle
>> above.
>> This should also better work in the case where target_vcpu is NULL
>> (because either no bit in TARGETSR is set or a non-existent MPIDR has
>> been written into IROUTER).
>>
> right.
>
> Thanks,
> -Christoffer
>
next prev parent reply other threads:[~2016-04-14 13:45 UTC|newest]
Thread overview: 138+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-25 2:04 [RFC PATCH 00/45] KVM: arm/arm64: Rework virtual GIC emulation Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 01/45] KVM: arm/arm64: add missing MMIO data write-back Andre Przywara
2016-03-29 12:33 ` Christoffer Dall
2016-04-05 12:12 ` Andre Przywara
2016-04-05 12:58 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 02/45] KVM: arm/arm64: pmu: abstract access to number of SPIs Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 03/45] KVM: arm/arm64: arch_timer: rework VGIC <-> timer interface Andre Przywara
2016-03-29 13:01 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 04/45] KVM: arm/arm64: vgic-new: Add data structure definitions Andre Przywara
2016-03-29 13:09 ` Christoffer Dall
2016-04-05 13:34 ` Andre Przywara
2016-04-05 20:10 ` Christoffer Dall
2016-04-06 13:57 ` Christoffer Dall
2016-04-06 14:09 ` Andre Przywara
2016-04-06 14:46 ` Christoffer Dall
2016-04-06 14:53 ` Andre Przywara
2016-04-06 14:57 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 05/45] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 06/45] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Andre Przywara
2016-03-29 21:16 ` Christoffer Dall
2016-04-05 17:28 ` Andre Przywara
2016-04-06 14:23 ` Christoffer Dall
2016-04-14 10:53 ` Andre Przywara
2016-04-14 12:15 ` Christoffer Dall
2016-04-14 13:45 ` Andre Przywara [this message]
2016-04-14 14:05 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 07/45] KVM: arm/arm64: vgic-new: Add vgic GICv2 change_affinity Andre Przywara
2016-03-30 9:29 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 08/45] KVM: arm/arm64: vgic-new: Add IRQ sorting Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 09/45] KVM: arm/arm64: vgic-new: Add GICv2 IRQ sync/flush Andre Przywara
2016-03-30 13:53 ` Christoffer Dall
2016-04-05 17:57 ` Andre Przywara
2016-04-06 14:34 ` Christoffer Dall
2016-03-31 9:47 ` Christoffer Dall
2016-04-11 11:40 ` Andre Przywara
2016-04-12 12:25 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 10/45] KVM: arm/arm64: vgic-new: Add GICv3 world switch backend Andre Przywara
2016-03-30 20:40 ` Christoffer Dall
2016-04-12 13:59 ` Andre Przywara
2016-04-12 15:02 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 11/45] KVM: arm/arm64: vgic-new: Implement kvm_vgic_vcpu_pending_irq Andre Przywara
2016-03-31 8:54 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 12/45] KVM: arm/arm64: vgic-new: Add MMIO handling framework Andre Przywara
2016-03-31 9:08 ` Christoffer Dall
2016-03-31 9:09 ` Christoffer Dall
2016-03-31 12:25 ` Paolo Bonzini
2016-03-31 14:31 ` Christoffer Dall
2016-04-01 12:11 ` André Przywara
2016-04-01 12:17 ` Christoffer Dall
2016-04-11 10:53 ` Andre Przywara
2016-04-12 12:50 ` Christoffer Dall
2016-04-12 15:56 ` Marc Zyngier
2016-04-12 17:26 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 13/45] KVM: arm/arm64: vgic-new: Export register access interface Andre Przywara
2016-03-31 9:24 ` Christoffer Dall
2016-04-11 11:09 ` Andre Przywara
2016-04-12 12:52 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 14/45] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Andre Przywara
2016-03-31 9:27 ` Christoffer Dall
2016-04-11 11:23 ` Andre Przywara
2016-04-12 12:55 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 15/45] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Andre Przywara
2016-03-31 9:33 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 16/45] KVM: arm/arm64: vgic-new: Add PENDING " Andre Przywara
2016-03-31 9:35 ` Christoffer Dall
2016-04-11 11:31 ` Andre Przywara
2016-04-12 13:10 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 17/45] KVM: arm/arm64: vgic-new: Add PRIORITY " Andre Przywara
2016-03-31 9:50 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 18/45] KVM: arm/arm64: vgic-new: Add ACTIVE " Andre Przywara
2016-03-31 9:58 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 19/45] KVM: arm/arm64: vgic-new: Add CONFIG " Andre Przywara
2016-03-31 10:07 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 20/45] KVM: arm/arm64: vgic-new: Add TARGET " Andre Przywara
2016-03-31 11:31 ` Christoffer Dall
2016-04-11 12:10 ` Andre Przywara
2016-04-12 13:18 ` Christoffer Dall
2016-04-12 15:18 ` Andre Przywara
2016-04-12 15:26 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 21/45] KVM: arm/arm64: vgic-new: Add SGIR register handler Andre Przywara
2016-03-31 11:35 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 22/45] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Andre Przywara
2016-03-31 11:37 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 23/45] KVM: arm/arm64: vgic-new: Add GICv3 emulation framework Andre Przywara
2016-03-31 11:48 ` Christoffer Dall
2016-04-11 12:44 ` Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 24/45] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Andre Przywara
2016-03-31 11:53 ` Christoffer Dall
2016-04-11 13:00 ` Andre Przywara
2016-04-12 13:20 ` Christoffer Dall
2016-03-25 2:04 ` [RFC PATCH 25/45] KVM: arm/arm64: vgic-new: Add GICv3 redistributor TYPER handler Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 26/45] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 27/45] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 28/45] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Andre Przywara
2016-03-31 12:07 ` Christoffer Dall
2016-04-11 13:11 ` Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 29/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 30/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 31/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 32/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 33/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 34/45] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 35/45] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Andre Przywara
2016-03-25 2:04 ` [RFC PATCH 36/45] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Andre Przywara
2016-03-25 2:05 ` [RFC PATCH 37/45] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Andre Przywara
2016-03-25 2:05 ` [RFC PATCH 38/45] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Andre Przywara
2016-03-25 2:05 ` [RFC PATCH 39/45] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Andre Przywara
2016-03-25 2:05 ` [RFC PATCH 40/45] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Andre Przywara
2016-03-31 17:59 ` Christoffer Dall
2016-04-01 8:20 ` Eric Auger
2016-04-01 9:00 ` Christoffer Dall
2016-03-25 2:05 ` [RFC PATCH 41/45] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Andre Przywara
2016-03-25 2:05 ` [RFC PATCH 42/45] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Andre Przywara
2016-03-25 2:05 ` [RFC PATCH 43/45] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Andre Przywara
2016-03-31 18:15 ` Christoffer Dall
2016-04-01 8:44 ` Eric Auger
2016-03-25 2:05 ` [RFC PATCH 44/45] KVM: arm/arm64: vgic-new: Add dummy MSI implementation Andre Przywara
2016-03-31 18:16 ` Christoffer Dall
2016-04-07 14:35 ` Eric Auger
2016-03-25 2:05 ` [RFC PATCH 45/45] KVM: arm/arm64: vgic-new: enable build Andre Przywara
2016-03-31 18:18 ` Christoffer Dall
2016-04-11 14:45 ` Andre Przywara
2016-04-12 13:21 ` Christoffer Dall
2016-03-25 15:58 ` [RFC PATCH 00/45] KVM: arm/arm64: Rework virtual GIC emulation Diana Madalina Craciun
2016-03-26 2:11 ` André Przywara
2016-03-29 13:12 ` Vladimir Murzin
2016-03-30 11:42 ` Vladimir Murzin
2016-03-30 11:52 ` Vladimir Murzin
2016-03-30 13:56 ` Christoffer Dall
2016-03-30 14:13 ` Vladimir Murzin
2016-03-30 19:53 ` Christoffer Dall
2016-03-30 12:07 ` Marc Zyngier
2016-03-30 19:55 ` Christoffer Dall
2016-03-31 9:06 ` Marc Zyngier
2016-03-31 18:28 ` Christoffer Dall
2016-03-31 18:30 ` Christoffer Dall
2016-04-13 16:07 ` André Przywara
2016-04-13 17:24 ` Christoffer Dall
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