From mboxrd@z Thu Jan 1 00:00:00 1970 From: Xiao Guangrong Subject: Re: [PATCH 1/5] mmu: mark spte present if the x bit is set Date: Wed, 29 Jun 2016 11:01:25 +0800 Message-ID: <57733A05.1050904@linux.intel.com> References: <1467088360-10186-1-git-send-email-bsd@redhat.com> <1467088360-10186-2-git-send-email-bsd@redhat.com> <55601232-c941-74e8-f740-fd09e9e8a6ae@redhat.com> <70de38d1-2743-09dd-dc47-6242799a701c@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org To: Paolo Bonzini , Bandan Das Return-path: Received: from mga09.intel.com ([134.134.136.24]:25917 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752450AbcF2DFN (ORCPT ); Tue, 28 Jun 2016 23:05:13 -0400 In-Reply-To: <70de38d1-2743-09dd-dc47-6242799a701c@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: On 06/29/2016 04:49 AM, Paolo Bonzini wrote: > > > On 28/06/2016 22:37, Bandan Das wrote: >> Paolo Bonzini writes: >> >>> On 28/06/2016 19:33, Bandan Das wrote: >>>>>>>> static int is_shadow_present_pte(u64 pte) >>>>>>>> { >>>>>>>> - return pte & PT_PRESENT_MASK && !is_mmio_spte(pte); >>>>>>>> + return pte & (PT_PRESENT_MASK | shadow_x_mask) && >>>>>>>> + !is_mmio_spte(pte); >>>>>> >>>>>> This should really be pte & 7 when using EPT. But this is okay as an >>>>>> alternative to a new shadow_present_mask. >>>> I could revive shadow_xonly_valid probably... Anyway, for now I will >>>> add a TODO comment here. >>> >>> It's okay to it like this, because the only invalid PTEs reaching this >>> point are those that is_mmio_spte filters away. Hence you'll never get >>> -W- PTEs here, and pte & 7 is really the same as how you wrote it. It's >>> pretty clever, and doesn't need a TODO at all. :) >> >> Thanks, understood. So, the way it is written now covers all cases for >> pte & 7. Let's still add a comment - clever things are usually >> confusing to many! > > I think another way to write it is "(pte & 0xFFFFFFFFull) && > !is_mmio_spte(pte)", since non-present/non-MMIO SPTEs never use bits > 1..31 (they can have non-zero bits 32..63 on 32-bit CPUs where we don't > update the PTEs atomically). Guangrong, what do you prefer? I think the way you innovated is better. :)