From mboxrd@z Thu Jan 1 00:00:00 1970 From: Suravee Suthikulpanit Subject: Re: [PART2 RFC v2 00/10] iommu/AMD: Introduce IOMMU AVIC support Date: Tue, 5 Jul 2016 13:51:46 -0500 Message-ID: <577C01C2.1010706@amd.com> References: <1465855611-10092-1-git-send-email-suravee.suthikulpanit@amd.com> <20160621135043.GJ28248@8bytes.org> Mime-Version: 1.0 Content-Type: text/plain; charset="windows-1252"; format=flowed Content-Transfer-Encoding: 7bit Cc: , , , , To: Paolo Bonzini , Joerg Roedel Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org Hi Paolo, On 6/21/16 10:15, Paolo Bonzini wrote: > > > On 21/06/2016 15:50, Joerg Roedel wrote: >> The code has a few style issues (thing I'd implemented differently), but >> it looks functional. Anyway, before merging this the last 3 patches need >> to be acked by the KVM maintainers. >> >> Paolo? > > I think patches 9 and 10 should be squashed because the code after patch > 9 is only partly functional. > > Likewise, I think this: > > > + > + if (AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir)) > + amd_iommu_irq_ops.capability |= (1 << IRQ_POSTING_CAP); > > from patch 1 should be moved to patch 6. I think you might have meant patch 7 instead of 6 since that is when we enable vAPIC mode in the IOMMU. Thanks, Suravee