From mboxrd@z Thu Jan 1 00:00:00 1970 From: Suravee Suthikulpanit Subject: Re: [PART2 PATCH v4 10/11] svm: Introduce AMD IOMMU avic_ga_log_notifier Date: Thu, 14 Jul 2016 16:43:47 +0700 Message-ID: <57875ED3.9090307@amd.com> References: <1468416032-7692-1-git-send-email-suravee.suthikulpanit@amd.com> <1468416032-7692-11-git-send-email-suravee.suthikulpanit@amd.com> <20160713142953.GA13201@potion> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: , , , , , To: =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= Return-path: Received: from mail-cys01nam02on0044.outbound.protection.outlook.com ([104.47.37.44]:7131 "EHLO NAM02-CY1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750916AbcGNJoN (ORCPT ); Thu, 14 Jul 2016 05:44:13 -0400 In-Reply-To: <20160713142953.GA13201@potion> Sender: kvm-owner@vger.kernel.org List-ID: Hi Radim, On 7/13/16 21:29, Radim Kr=C4=8Dm=C3=A1=C5=99 wrote: > 2016-07-13 08:20-0500, Suravee Suthikulpanit: >> >From: Suravee Suthikulpanit >> > >> >This patch introduces avic_ga_log_notifier, which will be called >> >by IOMMU driver whenever it handles the Guest vAPIC (GA) log entry. >> > >> >Signed-off-by: Suravee Suthikulpanit >> >--- >> > arch/x86/include/asm/kvm_host.h | 2 ++ >> > arch/x86/kvm/svm.c | 68 ++++++++++++++++++++++++++++= +++++++++++-- >> > 2 files changed, 68 insertions(+), 2 deletions(-) >> > >> >diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm= /kvm_host.h >> >index 69e62862..a9466ad 100644 >> >--- a/arch/x86/include/asm/kvm_host.h >> >+++ b/arch/x86/include/asm/kvm_host.h >> >@@ -776,9 +776,11 @@ struct kvm_arch { >> > bool disabled_lapic_found; >> > >> > /* Struct members for AVIC */ >> >+ u32 avic_vm_id; >> > u32 ldr_mode; >> > struct page *avic_logical_id_table_page; >> > struct page *avic_physical_id_table_page; >> >+ struct hlist_node hnode; >> > }; >> > >> > struct kvm_vm_stat { >> >diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c >> >index 16ef31b..1d9f2f6 100644 >> >--- a/arch/x86/kvm/svm.c >> >+++ b/arch/x86/kvm/svm.c >> >@@ -34,6 +34,8 @@ >> > #include >> > #include >> > #include >> >+#include >> >+#include >> > >> > #include >> > #include >> >@@ -928,6 +930,53 @@ static void svm_disable_lbrv(struct vcpu_svm *= svm) >> > set_msr_interception(msrpm, MSR_IA32_LASTINTTOIP, 0, 0); >> > } >> > >> >+/* Note: >> >+ * This hash table is used to map VM_ID to a struct kvm_arch, >> >+ * when handling AMD IOMMU GALOG notification to schedule in >> >+ * a particular vCPU. >> >+ */ >> >+#define SVM_VM_DATA_HASH_BITS 8 >> >+DECLARE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HASH_BITS); >> >+static spinlock_t svm_vm_data_hash_lock; >> >+ >> >+/* Note: >> >+ * This function is called from IOMMU driver to notify >> >+ * SVM to schedule in a particular vCPU of a particular VM. >> >+ */ >> >+static int avic_ga_log_notifier(int vm_id, int vcpu_id) >> >+{ >> >+ unsigned long flags; >> >+ struct kvm_arch *ka =3D NULL; >> >+ struct kvm_vcpu *vcpu =3D NULL; >> >+ struct vcpu_svm *svm =3D NULL; >> >+ >> >+ pr_debug("SVM: %s: vm_id=3D%#x, vcpu_id=3D%#x\n", __func__, vm_id= , vcpu_id); >> >+ >> >+ spin_lock_irqsave(&svm_vm_data_hash_lock, flags); >> >+ hash_for_each_possible(svm_vm_data_hash, ka, hnode, vm_id) { >> >+ struct kvm *kvm =3D container_of(ka, struct kvm, arch); >> >+ >> >+ vcpu =3D kvm_get_vcpu_by_id(kvm, vcpu_id); > The first result is not neccessarily the correct one. > > With more than active 256 VMs, there is a guaranteed collision that > cannot be disambiguated, so VCPUs in both VMs need to be woken up. > > Having a 24 bit vm_id and checking that > kvm->*.avic_id & 0xfffff =3D=3D vm_id > would help a bit to avoid useless wakeups, but the collision cannot b= e > avoided. True. What if SVM guarantee that the VM_ID won't conflict b/w any two=20 active VMs? Thanks Suravee.