[PATCH v5 13/14] x86/tsc: Mark Secure TSC as reliable clocksource

Nikunj A Dadhania
2023-10-30T06:39:06Z

AMD SNP guests may have Secure TSC feature enabled. Secure TSC as
clocksource is wrongly marked as unstable, mark Secure TSC as
reliable.

Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
---
arch/x86/kernel/tsc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 15f97c0abc9d..b0a8546d3703 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -1241,7 +1241,7 @@ static void __init check_system_tsc_reliable(void)
tsc_clocksource_reliable = 1;
}
#endif
- if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
+ if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE) || cc_platform_has(CC_ATTR_GUEST_SECURE_TSC))
tsc_clocksource_reliable = 1;

/*
--
2.34.1