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From: "Huang, Kai" <kai.huang@intel.com>
To: "pbonzini@redhat.com" <pbonzini@redhat.com>,
	"seanjc@google.com" <seanjc@google.com>,
	"nikunj@amd.com" <nikunj@amd.com>
Cc: "thomas.lendacky@amd.com" <thomas.lendacky@amd.com>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
	"santosh.shukla@amd.com" <santosh.shukla@amd.com>,
	"bp@alien8.de" <bp@alien8.de>
Subject: Re: [PATCH v5 7/8] KVM: SVM: Add Page modification logging support
Date: Wed, 14 Jan 2026 22:48:56 +0000	[thread overview]
Message-ID: <58fbe8af3e34e01e7f5acdf3eefe13b5cab35631.camel@intel.com> (raw)
In-Reply-To: <20260105063622.894410-8-nikunj@amd.com>

On Mon, 2026-01-05 at 06:36 +0000, Nikunj A Dadhania wrote:
> Currently, dirty logging relies on write protecting guest memory and
> marking dirty GFNs during subsequent write faults. This method works but
> incurs overhead due to additional write faults for each dirty GFN.
> 
> Implement support for the Page Modification Logging (PML) feature, a
> hardware-assisted method for efficient dirty logging. PML automatically
> logs dirty GPA[51:12] to a 4K buffer when the CPU sets NPT D-bits. Two new
> VMCB fields are utilized: PML_ADDR and PML_INDEX. The PML_INDEX is
> initialized to 511 (8 bytes per GPA entry), and the CPU decreases the
> PML_INDEX after logging each GPA. When the PML buffer is full, a
> VMEXIT(PML_FULL) with exit code 0x407 is generated.
> 
> 

Could you add sentence(s) to clarify PML works for SEV* guests on hardware
level in the same way as for normal SVM guests?

This justifies the code change like always setting cpu_dirty_log_size for
all AMD VMs when PML is enabled in svm_vm_init() (IIRC).  Otherwise you
need to have code to make sure it's cleared for SEV* guests.

  parent reply	other threads:[~2026-01-14 22:49 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-05  6:36 [PATCH v5 0/8] KVM: SVM: Add Page Modification Logging (PML) support Nikunj A Dadhania
2026-01-05  6:36 ` [PATCH v5 1/8] KVM: x86: Carve out PML flush routine Nikunj A Dadhania
2026-01-12 10:02   ` Huang, Kai
2026-01-14 13:57     ` Nikunj A. Dadhania
2026-01-05  6:36 ` [PATCH v5 2/8] KVM: x86: Move PML page to common vcpu arch structure Nikunj A Dadhania
2026-01-12 10:07   ` Huang, Kai
2026-01-05  6:36 ` [PATCH v5 3/8] KVM: VMX: Use cpu_dirty_log_size instead of enable_pml for PML checks Nikunj A Dadhania
2026-01-05  6:49   ` Gupta, Pankaj
2026-01-05  6:36 ` [PATCH v5 4/8] KVM: x86: Move nested CPU dirty logging logic to common code Nikunj A Dadhania
2026-01-12 10:08   ` Huang, Kai
2026-01-05  6:36 ` [PATCH v5 5/8] x86/cpufeatures: Add Page modification logging Nikunj A Dadhania
2026-01-05  6:36 ` [PATCH v5 6/8] KVM: SVM: Use BIT_ULL for 64-bit nested_ctl bit definitions Nikunj A Dadhania
2026-01-05  6:36 ` [PATCH v5 7/8] KVM: SVM: Add Page modification logging support Nikunj A Dadhania
2026-01-12 10:24   ` Huang, Kai
2026-01-14 14:03     ` Nikunj A. Dadhania
2026-01-14 23:10       ` Huang, Kai
2026-01-14 22:48   ` Huang, Kai [this message]
2026-01-16  4:12     ` Nikunj A. Dadhania
2026-01-05  6:36 ` [PATCH v5 8/8] selftests: KVM: x86: Add SEV PML dirty logging test Nikunj A Dadhania
2026-01-14 11:36   ` Huang, Kai
2026-01-14 14:27     ` Nikunj A. Dadhania
2026-01-14 22:44       ` Huang, Kai

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