From: Wei Wang <wei.w.wang@intel.com>
To: Andi Kleen <ak@linux.intel.com>
Cc: kvm@vger.kernel.org, mst@redhat.com, rkrcmar@redhat.com,
linux-kernel@vger.kernel.org,
virtualization@lists.linux-foundation.org, mingo@redhat.com,
pbonzini@redhat.com
Subject: Re: [PATCH v1 4/4] KVM/vmx: enable lbr for the guest
Date: Tue, 26 Sep 2017 16:56:43 +0800 [thread overview]
Message-ID: <59CA164B.1080707@intel.com> (raw)
In-Reply-To: <20170925145720.GM4311@tassilo.jf.intel.com>
On 09/25/2017 10:57 PM, Andi Kleen wrote:
>> +static void auto_switch_lbr_msrs(struct vcpu_vmx *vmx)
>> +{
>> + int i;
>> + struct perf_lbr_stack lbr_stack;
>> +
>> + perf_get_lbr_stack(&lbr_stack);
>> +
>> + add_atomic_switch_msr(vmx, MSR_LBR_SELECT, 0, 0);
>> + add_atomic_switch_msr(vmx, lbr_stack.lbr_tos, 0, 0);
>> +
>> + for (i = 0; i < lbr_stack.lbr_nr; i++) {
>> + add_atomic_switch_msr(vmx, lbr_stack.lbr_from + i, 0, 0);
>> + add_atomic_switch_msr(vmx, lbr_stack.lbr_to + i, 0, 0);
>> + if (lbr_stack.lbr_info)
>> + add_atomic_switch_msr(vmx, lbr_stack.lbr_info + i, 0,
>> + 0);
>> + }
> That will be really expensive and add a lot of overhead to every entry/exit.
> perf can already context switch the LBRs on task context switch. With that
> you can just switch LBR_SELECT, which is *much* cheaper because there
> are far less context switches than exit/entries.
>
> It implies that when KVM is running it needs to prevent perf from enabling
> LBRs in the context of KVM, but that should be straight forward.
I kind of have a different thought here:
1) vCPU context switching and guest side task switching are not identical.
That is, when the vCPU is scheduled out, the guest task on the vCPU may not
run out its time slice yet, so the task will continue to run when the
vCPU is
scheduled in by the host (lbr wasn't save by the guest task when the vCPU is
scheduled out in this case).
It is possible to have the vCPU which runs the guest task (in use of
lbr) scheduled
out, followed by a new host task being scheduled in on the pCPU to run.
It is not guaranteed that the new host task does not use the LBR feature
on the
pCPU.
2) Sometimes, people may want this usage: "perf record -b
./qemu-system-x86_64 ...",
which will need lbr to be used in KVM as well.
I think one possible optimization we could do would be to add the LBR
MSRs to auto
switching when the guest requests to enable the feature, and remove them
when
being disabled. This will need to trap guest access to MSR_DEBUGCTL.
Best,
Wei
next prev parent reply other threads:[~2017-09-26 8:56 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-25 4:44 [PATCH v1 0/4] Enable LBR for the guest Wei Wang
2017-09-25 4:44 ` [PATCH v1 1/4] KVM/vmx: re-write the msr auto switch feature Wei Wang
2017-09-25 11:54 ` Paolo Bonzini
2017-09-25 13:02 ` Wei Wang
2017-09-25 14:24 ` Paolo Bonzini
2017-09-25 4:44 ` [PATCH v1 2/4] KVM/vmx: auto switch MSR_IA32_DEBUGCTLMSR Wei Wang
2017-09-25 11:57 ` Paolo Bonzini
2017-09-25 4:44 ` [PATCH v1 3/4] perf/x86: add a function to get the lbr stack Wei Wang
2017-09-25 4:44 ` [PATCH v1 4/4] KVM/vmx: enable lbr for the guest Wei Wang
2017-09-25 9:16 ` Paolo Bonzini
2017-09-25 12:57 ` Wei Wang
2017-09-25 14:57 ` Andi Kleen
2017-09-26 8:56 ` Wei Wang [this message]
2017-09-26 16:41 ` Andi Kleen
2017-09-27 1:27 ` Wei Wang
2017-09-25 14:59 ` [PATCH v1 0/4] Enable LBR " Andi Kleen
2017-09-26 8:47 ` Wei Wang
2017-09-26 16:51 ` Andi Kleen
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