From mboxrd@z Thu Jan 1 00:00:00 1970 From: Liran Alon Subject: Re: [PATCH 3/3] KVM: VMX: introduce X2APIC_MSR macro Date: Thu, 21 Dec 2017 14:41:08 +0200 Message-ID: <5A3BABE4.7050507@ORACLE.COM> References: <1513857062-44013-1-git-send-email-pbonzini@redhat.com> <1513857062-44013-4-git-send-email-pbonzini@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: jmattson@google.com, david@redhat.com To: Paolo Bonzini , linux-kernel@vger.kernel.org, kvm@vger.kernel.org Return-path: In-Reply-To: <1513857062-44013-4-git-send-email-pbonzini@redhat.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 21/12/17 13:51, Paolo Bonzini wrote: > Remove duplicate expression in nested_vmx_prepare_msr_bitmap, and make > the register names clearer in hardware_setup. > > Suggested-by: Jim Mattson > Reviewed-by: Jim Mattson > Signed-off-by: Paolo Bonzini > --- > arch/x86/kvm/vmx.c | 19 +++++++++---------- > 1 file changed, 9 insertions(+), 10 deletions(-) > > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index 68239aabec52..4771e9a771c4 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -5257,6 +5257,8 @@ static void pt_disable_intercept_for_msr(bool flag) > } > } > > +#define X2APIC_MSR(r) (APIC_BASE_MSR + ((r) >> 4)) > + > static void vmx_disable_intercept_msr_x2apic(u32 msr, int type, bool apicv_only) > { > __vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic_apicv, > @@ -7139,7 +7141,7 @@ static __init int hardware_setup(void) > set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */ > > for (msr = 0x800; msr <= 0x8ff; msr++) { > - if (msr == 0x839 /* TMCCT */) > + if (msr == X2APIC_MSR(APIC_TMCCT)) > continue; > vmx_disable_intercept_msr_x2apic(msr, MSR_TYPE_R, true); > } > @@ -7148,12 +7150,9 @@ static __init int hardware_setup(void) > * TPR reads and writes can be virtualized even if virtual interrupt > * delivery is not in use. > */ > - vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_R | MSR_TYPE_W, false); > - > - /* EOI */ > - vmx_disable_intercept_msr_x2apic(0x80b, MSR_TYPE_W, true); > - /* SELF-IPI */ > - vmx_disable_intercept_msr_x2apic(0x83f, MSR_TYPE_W, true); > + vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_R | MSR_TYPE_W, false); > + vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_EOI), MSR_TYPE_W, true); > + vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_SELF_IPI), MSR_TYPE_W, true); > > if (enable_ept) > vmx_enable_tdp(); > @@ -10347,17 +10346,17 @@ static inline bool nested_vmx_prepare_msr_bitmap(struct kvm_vcpu *vcpu, > > nested_vmx_disable_intercept_for_msr( > msr_bitmap_l1, msr_bitmap_l0, > - APIC_BASE_MSR + (APIC_TASKPRI >> 4), > + X2APIC_MSR(APIC_TASKPRI), > MSR_TYPE_W); > > if (nested_cpu_has_vid(vmcs12)) { > nested_vmx_disable_intercept_for_msr( > msr_bitmap_l1, msr_bitmap_l0, > - APIC_BASE_MSR + (APIC_EOI >> 4), > + X2APIC_MSR(APIC_EOI), > MSR_TYPE_W); > nested_vmx_disable_intercept_for_msr( > msr_bitmap_l1, msr_bitmap_l0, > - APIC_BASE_MSR + (APIC_SELF_IPI >> 4), > + X2APIC_MSR(APIC_SELF_IPI), > MSR_TYPE_W); > } > kunmap(page); > Reviewed-by: Liran Alon