From mboxrd@z Thu Jan 1 00:00:00 1970 From: Liran Alon Subject: Re: [PATCH 2/7] x86/msr: add definitions for indirect branch predictor MSRs Date: Mon, 08 Jan 2018 21:10:55 +0200 Message-ID: <5A53C23F.1040305@ORACLE.COM> References: <1515434925-10250-1-git-send-email-pbonzini@redhat.com> <1515434925-10250-3-git-send-email-pbonzini@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Cc: jmattson@google.com, aliguori@amazon.com, thomas.lendacky@amd.com, dwmw@amazon.co.uk, bp@alien8.de To: Paolo Bonzini , linux-kernel@vger.kernel.org, kvm@vger.kernel.org Return-path: In-Reply-To: <1515434925-10250-3-git-send-email-pbonzini@redhat.com> Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 08/01/18 20:08, Paolo Bonzini wrote: > KVM will start using them soon. > > Signed-off-by: Paolo Bonzini > --- > arch/x86/include/asm/msr-index.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index 03ffde6217d0..ec08f1d8d39b 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -39,6 +39,11 @@ > > /* Intel MSRs. Some also available on other CPUs */ > > +#define MSR_IA32_SPEC_CTRL 0x00000048 > + > +#define MSR_IA32_PRED_CMD 0x00000049 > +#define FEATURE_SET_IBPB (1UL << 0) > + > #define MSR_PPIN_CTL 0x0000004e > #define MSR_PPIN 0x0000004f > > Trivially, Reviewed-by: Liran Alon