From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jari Ruusu Subject: Re: [PATCH 4.14 121/146] x86/fpu: Disable bottom halves while loading FPU registers Date: Wed, 05 Dec 2018 18:26:24 +0200 Message-ID: <5C07FC30.43601034@users.sourceforge.net> References: <20181204103726.750894136@linuxfoundation.org> <20181204103731.697870447@linuxfoundation.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: linux-kernel@vger.kernel.org, stable@vger.kernel.org, Sebastian Andrzej Siewior , Borislav Petkov , Ingo Molnar , Thomas Gleixner , Andy Lutomirski , Dave Hansen , "H. Peter Anvin" , "Jason A. Donenfeld" , kvm ML , Paolo Bonzini , " Radim =?iso-8859-1?Q?Kr=3Fm=E1=3F?=" , Rik van Riel , x86-ml To: Greg Kroah-Hartman Return-path: Sender: stable-owner@vger.kernel.org List-Id: kvm.vger.kernel.org Greg Kroah-Hartman wrote: > commit 68239654acafe6aad5a3c1dc7237e60accfebc03 upstream. > > The sequence > > fpu->initialized = 1; /* step A */ > preempt_disable(); /* step B */ > fpu__restore(fpu); > preempt_enable(); > > in __fpu__restore_sig() is racy in regard to a context switch. That same race appears to be present in older kernel branches also. The context is sligthly different, so the patch for 4.14 does not apply cleanly to older kernels. For 4.9 branch, this edit works: s/fpu->initialized/fpu->fpstate_active/ --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -342,10 +342,10 @@ static int __fpu__restore_sig(void __use sanitize_restored_xstate(tsk, &env, xfeatures, fx_only); } + local_bh_disable(); fpu->fpstate_active = 1; - preempt_disable(); fpu__restore(fpu); - preempt_enable(); + local_bh_enable(); return err; } else {