From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Wang Subject: Re: [PATCH v4 05/10] KVM/x86: expose MSR_IA32_PERF_CAPABILITIES to the guest Date: Mon, 07 Jan 2019 17:15:13 +0800 Message-ID: <5C3318A1.9090009@intel.com> References: <1545816338-1171-1-git-send-email-wei.w.wang@intel.com> <1545816338-1171-6-git-send-email-wei.w.wang@intel.com> <5C2DC132.9050103@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Cc: LKML , kvm list , Paolo Bonzini , Andi Kleen , Peter Zijlstra , Kan Liang , Ingo Molnar , =?UTF-8?B?UmFkaW0gS3LEjW3DocWZ?= , like.xu@intel.com, Jann Horn , arei.gonglei@huawei.com To: Jim Mattson Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org List-Id: kvm.vger.kernel.org On 01/03/2019 11:25 PM, Jim Mattson wrote: > On Wed, Jan 2, 2019 at 11:55 PM Wei Wang wrote: > >> Right, thanks. Probably better to change it to below: >> >> msr_info->data = 0; >> data = native_read_msr(MSR_IA32_PERF_CAPABILITIES); >> if (vcpu->kvm->arch.lbr_in_guest) >> msr_info->data |= (data & X86_PERF_CAP_MASK_LBR_FMT); >> > This still breaks backwards compatibility. Returning 0 and raising #GP > are not the same. I'm not sure about raising GP# in this case. This PERF_CAP msr contains more things than the lbr format. For example, a guest with lbr=false option could read it to get PEBS_FMT, which is PERF_CAP[11:8]. We should offer those bits in this case. When lbr=false, the lbr feature is not usable by the guest, so I think whatever value (0 or other value) of the LBR_FMT bits that we give to the guest might not be important. Best, Wei