From: Paolo Bonzini <pbonzini@redhat.com>
To: "Yang, Weijiang" <weijiang.yang@intel.com>
Cc: "jmattson@google.com" <jmattson@google.com>,
"seanjc@google.com" <seanjc@google.com>,
"kan.liang@linux.intel.com" <kan.liang@linux.intel.com>,
"like.xu.linux@gmail.com" <like.xu.linux@gmail.com>,
"vkuznets@redhat.com" <vkuznets@redhat.com>,
"Wang, Wei W" <wei.w.wang@intel.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v11 14/16] KVM: x86/vmx: Flip Arch LBREn bit on guest state change
Date: Tue, 17 May 2022 11:01:05 +0200 [thread overview]
Message-ID: <6212bdfe-ecd2-3787-a2cb-b285318b102a@redhat.com> (raw)
In-Reply-To: <d68f61ab-d122-809b-913e-4eaf89b337c4@intel.com>
On 5/17/22 10:56, Yang, Weijiang wrote:
>> I added more things to ease migration handling in SMM because: 1) qemu
>> checks LBREn before transfer Arch LBR MSRs.
I think it should always transfer them instead? There's time to post a
fixup patch.
>> 2) Perf event is created when
>> LBREn is being set. Two things are not certain: 1) IA32_LBR_CTL doesn't have
>> corresponding slot in SMRAM,not sure if we need to rely on it to transfer the MSR.
>> I chose 0x7f10 as the offset(CET takes 0x7f08) for storage, need you double check if
>> it's free or used.
0x7f10 sounds good.
> Hi, Paolo,
>
> I found there're some rebase conflicts between this series and your kvm
> queue branch due to PEBS patches, I can re-post a new version based on
> your queue branch if necessary.
Yes, please.
> Waiting for your comments on this patch...
I already commented that using bit 63 is not good, didn't I?
Paolo
next prev parent reply other threads:[~2022-05-17 9:01 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-06 3:32 [PATCH v11 00/16] Introduce Architectural LBR for vPMU Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 01/16] perf/x86/intel: Fix the comment about guest LBR support on KVM Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 02/16] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 03/16] KVM: x86: Report XSS as an MSR to be saved if there are supported features Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 04/16] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 05/16] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 06/16] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2022-05-06 14:39 ` Liang, Kan
2022-05-06 3:32 ` [PATCH v11 07/16] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2022-05-06 14:42 ` Liang, Kan
2022-05-06 3:32 ` [PATCH v11 08/16] KVM: x86/pmu: Refactor code to support " Yang Weijiang
2022-05-06 15:03 ` Liang, Kan
2022-05-07 2:32 ` Yang, Weijiang
2022-05-09 14:06 ` Liang, Kan
2022-05-06 3:32 ` [PATCH v11 09/16] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2022-05-06 3:32 ` [PATCH v11 10/16] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2022-05-06 3:33 ` [PATCH v11 11/16] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2022-05-06 3:33 ` [PATCH v11 12/16] KVM: nVMX: Add necessary Arch LBR settings for nested VM Yang Weijiang
2022-05-06 3:33 ` [PATCH v11 13/16] KVM: x86/vmx: Clear Arch LBREn bit before inject #DB to guest Yang Weijiang
2022-05-06 15:08 ` Liang, Kan
2022-05-06 3:33 ` [PATCH v11 14/16] KVM: x86/vmx: Flip Arch LBREn bit on guest state change Yang Weijiang
2022-05-06 15:08 ` Liang, Kan
2022-05-10 15:51 ` Paolo Bonzini
2022-05-11 7:43 ` Yang, Weijiang
2022-05-12 13:18 ` Paolo Bonzini
2022-05-12 14:38 ` Yang, Weijiang
2022-05-13 4:02 ` Yang, Weijiang
2022-05-17 8:56 ` Yang, Weijiang
2022-05-17 9:01 ` Paolo Bonzini [this message]
2022-05-17 11:31 ` Yang, Weijiang
2022-05-12 6:44 ` Yang, Weijiang
2022-05-06 3:33 ` [PATCH v11 15/16] KVM: x86: Add Arch LBR data MSR access interface Yang Weijiang
2022-05-06 15:11 ` Liang, Kan
2022-05-06 3:33 ` [PATCH v11 16/16] KVM: x86/cpuid: Advertise Arch LBR feature in CPUID Yang Weijiang
2022-05-06 15:13 ` Liang, Kan
2022-05-10 15:55 ` [PATCH v11 00/16] Introduce Architectural LBR for vPMU Paolo Bonzini
2022-05-11 0:29 ` Yang, Weijiang
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