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From: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
To: Sean Christopherson <seanjc@google.com>
Cc: linux-kernel@vger.kernel.org, bp@alien8.de, tglx@linutronix.de,
	mingo@redhat.com, dave.hansen@linux.intel.com,
	Thomas.Lendacky@amd.com, nikunj@amd.com, Santosh.Shukla@amd.com,
	Vasant.Hegde@amd.com, Suravee.Suthikulpanit@amd.com,
	David.Kaplan@amd.com, x86@kernel.org, hpa@zytor.com,
	peterz@infradead.org, pbonzini@redhat.com, kvm@vger.kernel.org,
	kirill.shutemov@linux.intel.com, huibo.wang@amd.com,
	naveen.rao@amd.com, francescolavra.fl@gmail.com
Subject: Re: [PATCH v5 01/20] KVM: x86: Move find_highest_vector() to a common header
Date: Tue, 29 Apr 2025 23:39:53 +0530	[thread overview]
Message-ID: <62ae9c91-b62e-4bf9-8cf2-e68ddd0a1487@amd.com> (raw)
In-Reply-To: <aBDlVF4qXeUltuju@google.com>



On 4/29/2025 8:12 PM, Sean Christopherson wrote:
...

>> +
>> +static inline int apic_find_highest_vector(void *bitmap)
>> +{
>> +	unsigned int regno;
>> +	unsigned int vec;
>> +	u32 *reg;
>> +
>> +	/*
>> +	 * The registers in the bitmap are 32-bit wide and 16-byte
>> +	 * aligned. State of a vector is stored in a single bit.
>> +	 */
>> +	for (regno = MAX_APIC_VECTOR / APIC_VECTORS_PER_REG - 1; regno >= 0; regno--) {
>> +		vec = regno * APIC_VECTORS_PER_REG;
>> +		reg = bitmap + regno * 16;
>> +		if (*reg)
>> +			return __fls(*reg) + vec;
>> +	}
> 
> NAK.  The changelog says nothing about rewriting the logic, and I have zero desire

My bad. I missed updating the changelog with the information about logic update.

> to review or test this for correctness.  If someone has requested that the logic be
> cleaned up, then do that as a separate patch (or patches) on top, with a changelog
> that justifies the change, because to my eyes this isn't an improvement.
>

Ok. I will keep the original logic in apic_find_highest_vector() in next version of
this patch.
 
> I suspect the rewrite is in part due to REG_POS() being a KVM helper that's poorly
> named for a global macro.  lapic_vector_set_in_irr() already has open coded
> versions of REG_POS() and VEC_POS(), just dedup those.
>  
> *sigh*
> 
> And you created your own versions of those in get_reg_bitmap() and get_vec_bit().
> 
> Please slot the below in.  And if there is any more code in this series that is
> duplicating existing functionality, try to figure out a clean way to share code
> instead of open coding yet another version.
> 

Ok sure. I will take your patch and reuse the APIC regs manipulation functions
between KVM and SAVIC in next version. Thanks for sharing the patch!


- Neeraj



  reply	other threads:[~2025-04-29 18:10 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-29  6:09 [PATCH v5 00/20] AMD: Add Secure AVIC Guest Support Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 01/20] KVM: x86: Move find_highest_vector() to a common header Neeraj Upadhyay
2025-04-29 14:42   ` Sean Christopherson
2025-04-29 18:09     ` Neeraj Upadhyay [this message]
2025-05-07 10:38       ` Borislav Petkov
2025-05-07 11:39         ` Neeraj Upadhyay
2025-06-10  6:32     ` Neeraj Upadhyay
2025-06-10 16:12       ` Sean Christopherson
2025-04-29  6:09 ` [PATCH v5 02/20] x86: apic: Move apic_update_irq_cfg() calls to apic_update_vector() Neeraj Upadhyay
2025-05-07  8:08   ` Thomas Gleixner
2025-04-29  6:09 ` [PATCH v5 03/20] x86/apic: Add new driver for Secure AVIC Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 04/20] x86/apic: Initialize Secure AVIC APIC backing page Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 05/20] x86/apic: Populate .read()/.write() callbacks of Secure AVIC driver Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 06/20] x86/apic: Initialize APIC ID for Secure AVIC Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 07/20] x86/apic: Add update_vector() callback for apic drivers Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 08/20] x86/apic: Add update_vector() callback for Secure AVIC Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 09/20] x86/apic: Add support to send IPI " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 10/20] x86/apic: Support LAPIC timer " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 11/20] x86/sev: Initialize VGIF for secondary VCPUs " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 12/20] x86/apic: Add support to send NMI IPI " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 13/20] x86/apic: Allow NMI to be injected from hypervisor " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 14/20] x86/sev: Enable NMI support " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 15/20] x86/apic: Read and write LVT* APIC registers from HV for SAVIC guests Neeraj Upadhyay
2025-04-29  6:10 ` [PATCH v5 16/20] x86/apic: Handle EOI writes for Secure AVIC guests Neeraj Upadhyay
2025-04-29  6:10 ` [PATCH v5 17/20] x86/apic: Add kexec support for Secure AVIC Neeraj Upadhyay
2025-04-29  6:10 ` [PATCH v5 18/20] x86/apic: Enable Secure AVIC in Control MSR Neeraj Upadhyay
2025-04-29  6:10 ` [PATCH v5 19/20] x86/sev: Prevent SECURE_AVIC_CONTROL MSR interception for Secure AVIC guests Neeraj Upadhyay
2025-04-29  6:10 ` [PATCH v5 20/20] x86/sev: Indicate SEV-SNP guest supports Secure AVIC Neeraj Upadhyay

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