From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vadim Rozenfeld Subject: Re: [RFC PATCH v2 2/2] add support for Hyper-V invariant TSC Date: Wed, 22 May 2013 03:22:55 -0400 (EDT) Message-ID: <643480794.5761686.1369207375451.JavaMail.root@redhat.com> References: <1368947197-9033-1-git-send-email-vrozenfe@redhat.com> <1368947197-9033-3-git-send-email-vrozenfe@redhat.com> <20130522005046.GA7589@amt.cnet> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Cc: kvm@vger.kernel.org, gleb@redhat.com, pl@dlh.net To: Marcelo Tosatti Return-path: Received: from mx4-phx2.redhat.com ([209.132.183.25]:39951 "EHLO mx4-phx2.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751220Ab3EVHW7 (ORCPT ); Wed, 22 May 2013 03:22:59 -0400 In-Reply-To: <20130522005046.GA7589@amt.cnet> Sender: kvm-owner@vger.kernel.org List-ID: ----- Original Message ----- From: "Marcelo Tosatti" To: "Vadim Rozenfeld" Cc: kvm@vger.kernel.org, gleb@redhat.com, pl@dlh.net Sent: Wednesday, May 22, 2013 10:50:46 AM Subject: Re: [RFC PATCH v2 2/2] add support for Hyper-V invariant TSC On Sun, May 19, 2013 at 05:06:37PM +1000, Vadim Rozenfeld wrote: > The following patch allows to activate a partition reference > time enlightenment that is based on the host platform's support > for an Invariant Time Stamp Counter (iTSC). > NOTE: This code will survive migration due to lack of VM stop/resume > handlers, when offset, scale and sequence should be > readjusted. > > --- > arch/x86/kvm/x86.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 9645dab..b423fe4 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -1838,7 +1838,6 @@ static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data) > u64 gfn; > unsigned long addr; > HV_REFERENCE_TSC_PAGE tsc_ref; > - tsc_ref.TscSequence = 0; > if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE)) { > kvm->arch.hv_tsc_page = data; > break; > @@ -1848,6 +1847,11 @@ static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data) > HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT); > if (kvm_is_error_hva(addr)) > return 1; > + tsc_ref.TscSequence = > + boot_cpu_has(X86_FEATURE_CONSTANT_TSC) ? 1 : 0; 1) You want NONSTOP_TSC (see 40fb1715 commit) which matches INVARIANT TSC. [VR] Thank you for reviewing. Will fix it. 2) TscSequence should increase? "This field serves as a sequence number that is incremented whenever..." [VR] Yes, on every VM resume, including migration. After migration we also need to recalculate scale and adjust offset. 3) 0xFFFFFFFF is the value for invalid source of reference time? [VR] Yes, on boot-up. In this case guest will go with PMTimer (not sure about HPET but I can check). But if we set sequence to 0xFFFFFFFF after migration - it's probably will not work. > + tsc_ref.TscScale = > + ((10000LL << 32) / vcpu->arch.virtual_tsc_khz) << 32; > + tsc_ref.TscOffset = 0; > if (__copy_to_user((void __user *)addr, &tsc_ref, sizeof(tsc_ref))) > return 1; > mark_page_dirty(kvm, gfn); > -- > 1.8.1.2