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From: Paolo Bonzini <pbonzini@redhat.com>
To: Wanpeng Li <kernellwp@gmail.com>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: Sean Christopherson <seanjc@google.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>
Subject: Re: [PATCH v3 2/3] KVM: vPMU: Fill get_msr MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0
Date: Tue, 19 Oct 2021 18:59:51 +0200	[thread overview]
Message-ID: <64702a4e-6759-e0f9-e116-7f874852e9d0@redhat.com> (raw)
In-Reply-To: <1634631160-67276-2-git-send-email-wanpengli@tencent.com>

On 19/10/21 10:12, Wanpeng Li wrote:
> From: Wanpeng Li <wanpengli@tencent.com>
> 
> SDM section 18.2.3 mentioned that:
> 
>    "IA32_PERF_GLOBAL_OVF_CTL MSR allows software to clear overflow indicator(s) of
>     any general-purpose or fixed-function counters via a single WRMSR."
> 
> It is R/W mentioned by SDM, we read this msr on bare-metal during perf testing,
> the value is always 0 for ICX/SKX boxes on hands. Let's fill get_msr
> MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0 as hardware behavior and drop
> global_ovf_ctrl variable.
> 
> Tested-by: Like Xu <likexu@tencent.com>
> Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
> ---
> Btw, xen also fills get_msr MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0.
> v1 -> v2:
>   * drop 'u64 global_ovf_ctrl' directly
> 
>   arch/x86/include/asm/kvm_host.h | 1 -
>   arch/x86/kvm/vmx/pmu_intel.c    | 6 ++----
>   2 files changed, 2 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index f8f48a7ec577..7aaac918e992 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -499,7 +499,6 @@ struct kvm_pmu {
>   	u64 fixed_ctr_ctrl;
>   	u64 global_ctrl;
>   	u64 global_status;
> -	u64 global_ovf_ctrl;
>   	u64 counter_bitmask[2];
>   	u64 global_ctrl_mask;
>   	u64 global_ovf_ctrl_mask;
> diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
> index 10cc4f65c4ef..b8e0d21b7c8a 100644
> --- a/arch/x86/kvm/vmx/pmu_intel.c
> +++ b/arch/x86/kvm/vmx/pmu_intel.c
> @@ -365,7 +365,7 @@ static int intel_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>   		msr_info->data = pmu->global_ctrl;
>   		return 0;
>   	case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
> -		msr_info->data = pmu->global_ovf_ctrl;
> +		msr_info->data = 0;
>   		return 0;
>   	default:
>   		if ((pmc = get_gp_pmc(pmu, msr, MSR_IA32_PERFCTR0)) ||
> @@ -423,7 +423,6 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>   		if (!(data & pmu->global_ovf_ctrl_mask)) {
>   			if (!msr_info->host_initiated)
>   				pmu->global_status &= ~data;
> -			pmu->global_ovf_ctrl = data;
>   			return 0;
>   		}
>   		break;
> @@ -588,8 +587,7 @@ static void intel_pmu_reset(struct kvm_vcpu *vcpu)
>   		pmc->counter = 0;
>   	}
>   
> -	pmu->fixed_ctr_ctrl = pmu->global_ctrl = pmu->global_status =
> -		pmu->global_ovf_ctrl = 0;
> +	pmu->fixed_ctr_ctrl = pmu->global_ctrl = pmu->global_status = 0;
>   
>   	intel_pmu_release_guest_lbr_event(vcpu);
>   }
> 

Queued, thanks.

Paolo


  reply	other threads:[~2021-10-19 17:00 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-19  8:12 [PATCH v3 1/3] KVM: emulate: Don't inject #GP when emulating RDMPC if CR0.PE=0 Wanpeng Li
2021-10-19  8:12 ` [PATCH v3 2/3] KVM: vPMU: Fill get_msr MSR_CORE_PERF_GLOBAL_OVF_CTRL w/ 0 Wanpeng Li
2021-10-19 16:59   ` Paolo Bonzini [this message]
2021-10-19  8:12 ` [PATCH v3 3/3] KVM: vCPU kick tax cut for running vCPU Wanpeng Li
2021-10-19 16:59   ` Paolo Bonzini
2021-10-19 17:34     ` Sean Christopherson
2021-10-20  2:49       ` Wanpeng Li
2021-10-20  6:47         ` Paolo Bonzini
2021-10-20 10:02           ` Wanpeng Li
2021-10-20 10:37             ` Paolo Bonzini
2021-10-20 10:33       ` Paolo Bonzini
2021-10-19 17:00 ` [PATCH v3 1/3] KVM: emulate: Don't inject #GP when emulating RDMPC if CR0.PE=0 Paolo Bonzini
2021-10-20  1:56   ` Wanpeng Li

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