Re: [PATCH v6 08/10] x86/virt/tdx: Reduce TDMR's reserved areas by using CMRs to find memory holes

["Huang, Kai" <kai.huang@intel.com>]

>>   	/*
>>   	 * Start looking for reserved blocks at the
>>   	 * beginning of the TDMR.
>>   	 */
>>   	prev_end = tdmr->base;
>> -	list_for_each_entry(tmb, tmb_list, list) {
>> +	for (i = 0; i < sysinfo_cmr->num_cmrs; i++) {
>>   		u64 start, end;
>>   
>> -		start = PFN_PHYS(tmb->start_pfn);
>> -		end   = PFN_PHYS(tmb->end_pfn);
>> +		start = sysinfo_cmr->cmr_base[i];
>> +		end   = start + sysinfo_cmr->cmr_size[i];
> 
> This had me go check the inclusive vs exclusive range comparisons. Even
> though it is not in this patch I think tdmr_populate_rsvd_holes() needs
> this fixup:
> 
> diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c
> index 4e2b2e2ac9f9..b5026edf1eeb 100644
> --- a/arch/x86/virt/vmx/tdx/tdx.c
> +++ b/arch/x86/virt/vmx/tdx/tdx.c
> @@ -776,7 +776,7 @@ static int tdmr_populate_rsvd_holes(struct list_head *tmb_list,
>                          break;
>   
>                  /* Exclude regions before this TDMR */
> -               if (end < tdmr->base)
> +               if (end <= tdmr->base)
>                          continue;
>   
>                  /*
> 
> ...because a CMR that ends at tdmr->base is still "before" the TDMR.

I think you are right.  Thanks for catching this.

But in practice this will not cause any problem because the check right 
after it:

                 /*
                  * Skip over memory areas that
                  * have already been dealt with.
                  */
                 if (start <= prev_end) {
                         prev_end = end;
                         continue;
                 }

.. will always be true and effectively skip this region.

So it is just a matter of 'skipping the region one step earlier or later'.

> 
> As that's a separate fixup you can add for this patch.

Yeah I agree logically this fixup is needed.  I'll send out as a 
separate patch and see.

> 
> Reviewed-by: Dan Williams <dan.j.williams@intel.com>

Thanks!