From: "Mi, Dapeng" <dapeng1.mi@linux.intel.com>
To: Zide Chen <zide.chen@intel.com>,
Sean Christopherson <seanjc@google.com>,
Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Jim Mattson <jmattson@google.com>,
Mingwei Zhang <mizhang@google.com>,
Das Sandipan <Sandipan.Das@amd.com>,
Shukla Manali <Manali.Shukla@amd.com>,
Falcon Thomas <thomas.falcon@intel.com>,
Xudong Hao <xudong.hao@intel.com>
Subject: Re: [PATCH 0/3] KVM: x86/pmu: Add hardware Topdown metrics support
Date: Thu, 9 Apr 2026 14:25:30 +0800 [thread overview]
Message-ID: <6a4471fd-d7da-4a3c-aa2b-5925e033c6b9@linux.intel.com> (raw)
In-Reply-To: <20260226230606.146532-1-zide.chen@intel.com>
Zide, it seems currently there is no KVM/selftests to cover the fixed
counter 3 and the topdown metrics support. We could enhance current PMU
selftest or add a new selftest to cover this case. Thanks.
On 2/27/2026 7:06 AM, Zide Chen wrote:
> The Top-Down Microarchitecture Analysis (TMA) method is a structured
> approach for identifying performance bottlenecks in out-of-order
> processors.
>
> Currently, guests support the TMA method by collecting Topdown events
> using GP counters, which may trigger multiplexing. To free up scarce
> GP counters, eliminate multiplexing-induced skew, and obtain coherent
> Topdown metric ratios, it is desirable to expose fixed counter 3 and
> the IA32_PERF_METRICS MSR to guests.
>
> Several failed attempts have been made to virtualize this under the
> legacy vPMU model: [1], [2], [3]. With the new mediated vPMU, enabling
> TMA support in guests becomes much simpler. It avoids invasive changes
> to the perf core, eliminates CPU pinning and fixed-counter affinity
> issues, and reduces the overhead of trapping and emulating MSR accesses.
>
> [1] https://lore.kernel.org/kvm/20231031090613.2872700-1-dapeng1.mi@linux.intel.com/
> [2] https://lore.kernel.org/all/20230927033124.1226509-1-dapeng1.mi@linux.intel.com/T/
> [3] https://lwn.net/ml/linux-kernel/20221212125844.41157-1-likexu@tencent.com/
>
> Tested on an SPR. Without this series, only raw topdown.*_slots events
> work in the guest, and metric events (e.g. cpu/topdown-bad-spec/) are
> not available.
>
> With this series, metric events are visible in the guest. Run this
> command on both host and guest:
>
> $ perf stat --topdown --no-metric-only -- taskset -c 2 perf bench sched messaging
>
> Host results:
>
> # Running 'sched/messaging' benchmark:
> # 20 sender and receiver processes per group
> # 10 groups == 400 processes run
>
> Total time: 1.500 [sec]
>
> Performance counter stats for 'taskset -c 2 perf bench sched messaging':
>
> 4,266,060,558 TOPDOWN.SLOTS:u # 32.0 % tma_frontend_bound
> # 5.2 % tma_bad_speculation
> 588,397,905 topdown-retiring:u # 13.8 % tma_retiring
> # 49.0 % tma_backend_bound
> 1,376,283,990 topdown-fe-bound:u
> 2,096,827,304 topdown-be-bound:u
> 217,425,841 topdown-bad-spec:u
> 5,050,520 INT_MISC.UOP_DROPPING:u
>
> 1.755503765 seconds time elapsed
>
> 0.235965000 seconds user
> 1.500508000 seconds sys
>
> Guest results:
>
> # Running 'sched/messaging' benchmark:
> # 20 sender and receiver processes per group
> # 10 groups == 400 processes run
>
> Total time: 1.558 [sec]
>
> Performance counter stats for 'taskset -c 2 perf bench sched messaging':
>
> 5,148,818,712 TOPDOWN.SLOTS:u # 34.0 % tma_frontend_bound
> # 4.6 % tma_bad_speculation
> 602,862,499 topdown-retiring:u # 11.7 % tma_retiring
> # 49.7 % tma_backend_bound
> 1,759,698,259 topdown-fe-bound:u
> 2,565,571,672 topdown-be-bound:u
> 230,277,308 topdown-bad-spec:u
> 4,966,279 INT_MISC.UOP_DROPPING:u
>
> 1.783366587 seconds time elapsed
>
> 0.313692000 seconds user
> 1.446377000 seconds sys
>
> Dapeng Mi (2):
> KVM: x86/pmu: Support Intel fixed counter 3 on mediated vPMU
> KVM: x86/pmu: Support PERF_METRICS MSR in mediated vPMU
>
> Zide Chen (1):
> KVM: x86/pmu: Do not map fixed counters >= 3 to generic perf events
>
> arch/x86/include/asm/kvm_host.h | 3 +-
> arch/x86/include/asm/msr-index.h | 1 +
> arch/x86/include/asm/perf_event.h | 1 +
> arch/x86/kvm/pmu.c | 4 +++
> arch/x86/kvm/vmx/pmu_intel.c | 57 ++++++++++++++++++++++++-------
> arch/x86/kvm/vmx/pmu_intel.h | 5 +++
> arch/x86/kvm/vmx/vmx.c | 6 ++++
> arch/x86/kvm/x86.c | 10 ++++--
> 8 files changed, 71 insertions(+), 16 deletions(-)
>
prev parent reply other threads:[~2026-04-09 6:25 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-26 23:06 [PATCH 0/3] KVM: x86/pmu: Add hardware Topdown metrics support Zide Chen
2026-02-26 23:06 ` [PATCH 1/3] KVM: x86/pmu: Do not map fixed counters >= 3 to generic perf events Zide Chen
2026-03-24 5:48 ` Mi, Dapeng
2026-03-27 20:53 ` Chen, Zide
2026-02-26 23:06 ` [PATCH 2/3] KVM: x86/pmu: Support Intel fixed counter 3 on mediated vPMU Zide Chen
2026-02-26 23:06 ` [PATCH 3/3] KVM: x86/pmu: Support PERF_METRICS MSR in " Zide Chen
2026-03-24 5:54 ` Mi, Dapeng
2026-03-27 20:23 ` Chen, Zide
2026-04-09 6:25 ` Mi, Dapeng [this message]
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