From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58DA9C433E1 for ; Tue, 9 Jun 2020 11:48:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 36ED72068D for ; Tue, 9 Jun 2020 11:48:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1591703330; bh=jZQ4Zg8DwzAMUN+GXuZsfRY/XUjTHIpyRTgWTNdxQ6U=; h=Date:From:To:Cc:Subject:In-Reply-To:References:List-ID:From; b=vbbrZ7R36+qzrsIM86uCCGTWm316FaR1m93fcivw4cnE/ZIXfjiZ7Pnfz13L4RIP8 Mec6gSDuLNKdw9+meJMP2MWOct60MXMzlKy6AFjueg7LaAJxikKCgNcUOa8fQ3AeGy AdLXhcvfXcHjFbKzJl/KbLKIw2u0PSfnQQ1gBW0g= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729052AbgFILst (ORCPT ); Tue, 9 Jun 2020 07:48:49 -0400 Received: from mail.kernel.org ([198.145.29.99]:53686 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726395AbgFILso (ORCPT ); Tue, 9 Jun 2020 07:48:44 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8E6B52068D; Tue, 9 Jun 2020 11:48:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1591703323; bh=jZQ4Zg8DwzAMUN+GXuZsfRY/XUjTHIpyRTgWTNdxQ6U=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=SJHtmjskzqroQWd1r6br+wTjNT4XT/FqsM/GKHQWDyjLzIrRFrVhmW0IDafmtC9Ww ehsbYKYgQVtTV/FweObun9JuYyHm7puwcbAMPh7GDgA5ur6YqoQ/+obEdfwg0sVJbn EaYlTyWJUdF7g4ky+Jz8KNOfDDuKxchuhUyVaMQk= Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1jickD-001ROy-Pv; Tue, 09 Jun 2020 12:48:41 +0100 MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Tue, 09 Jun 2020 12:48:41 +0100 From: Marc Zyngier To: Robin Murphy Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel-team@android.com, James Morse , stable@vger.kernel.org, Julien Thierry , Suzuki K Poulose Subject: Re: [PATCH 1/2] KVM: arm64: Make vcpu_cp1x() work on Big Endian hosts In-Reply-To: <7c173265-3f8e-51df-d700-7e3658a0e4d8@arm.com> References: <20200609084921.1448445-1-maz@kernel.org> <20200609084921.1448445-2-maz@kernel.org> <7c173265-3f8e-51df-d700-7e3658a0e4d8@arm.com> User-Agent: Roundcube Webmail/1.4.4 Message-ID: <7451e64c22d8432f998458e0343aee7f@kernel.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: robin.murphy@arm.com, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel-team@android.com, james.morse@arm.com, stable@vger.kernel.org, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Hi Robin, On 2020-06-09 12:41, Robin Murphy wrote: > On 2020-06-09 09:49, Marc Zyngier wrote: >> AArch32 CP1x registers are overlayed on their AArch64 counterparts >> in the vcpu struct. This leads to an interesting problem as they >> are stored in their CPU-local format, and thus a CP1x register >> doesn't "hit" the lower 32bit portion of the AArch64 register on >> a BE host. >> >> To workaround this unfortunate situation, introduce a bias trick >> in the vcpu_cp1x() accessors which picks the correct half of the >> 64bit register. >> >> Cc: stable@vger.kernel.org >> Reported-by: James Morse >> Signed-off-by: Marc Zyngier >> --- >> arch/arm64/include/asm/kvm_host.h | 10 ++++++++-- >> 1 file changed, 8 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm64/include/asm/kvm_host.h >> b/arch/arm64/include/asm/kvm_host.h >> index 59029e90b557..e80c0e06f235 100644 >> --- a/arch/arm64/include/asm/kvm_host.h >> +++ b/arch/arm64/include/asm/kvm_host.h >> @@ -404,8 +404,14 @@ void vcpu_write_sys_reg(struct kvm_vcpu *vcpu, >> u64 val, int reg); >> * CP14 and CP15 live in the same array, as they are backed by the >> * same system registers. >> */ >> -#define vcpu_cp14(v,r) ((v)->arch.ctxt.copro[(r)]) >> -#define vcpu_cp15(v,r) ((v)->arch.ctxt.copro[(r)]) >> +#ifdef CPU_BIG_ENDIAN > > Ahem... I think you're missing a "CONFIG_" there ;) Duh! As I said, I didn't test the thing at all! ;-) > Bonus trickery - for a 0 or 1 value you can simply use IS_ENABLED(). Beautiful! Definitely a must! :D Thanks, M. -- Jazz is not dead. It just smells funny...