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client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BN1PEPF0000468A.mail.protection.outlook.com (10.167.243.135) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8466.11 via Frontend Transport; Tue, 18 Feb 2025 08:08:03 +0000 Received: from BLR-L1-NDADHANI (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 18 Feb 2025 02:08:00 -0600 From: Nikunj A Dadhania To: Tom Lendacky , , , CC: , , Subject: Re: [PATCH v3 3/5] KVM: SVM: Add GUEST_TSC_FREQ MSR for Secure TSC enabled guests In-Reply-To: <6ad0aa86-fb21-872a-5423-8eb996b0e7fe@amd.com> References: <20250217102237.16434-1-nikunj@amd.com> <20250217102237.16434-4-nikunj@amd.com> <6ad0aa86-fb21-872a-5423-8eb996b0e7fe@amd.com> Date: Tue, 18 Feb 2025 08:07:58 +0000 Message-ID: <85h64riskh.fsf@amd.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468A:EE_|CY8PR12MB8244:EE_ X-MS-Office365-Filtering-Correlation-Id: 8faab947-fc21-4463-7ce7-08dd4ff35e7b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|376014|1800799024; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Feb 2025 08:08:03.6651 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8faab947-fc21-4463-7ce7-08dd4ff35e7b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468A.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8244 Tom Lendacky writes: > On 2/17/25 04:22, Nikunj A Dadhania wrote: >> Introduce the read-only MSR GUEST_TSC_FREQ (0xc0010134) that returns >> guest's effective frequency in MHZ when Secure TSC is enabled for SNP >> guests. Disable interception of this MSR when Secure TSC is enabled. Note >> that GUEST_TSC_FREQ MSR is accessible only to the guest and not from the >> hypervisor context. >> >> Signed-off-by: Nikunj A Dadhania >> --- >> arch/x86/include/asm/svm.h | 1 + >> arch/x86/kvm/svm/sev.c | 2 ++ >> arch/x86/kvm/svm/svm.c | 1 + >> arch/x86/kvm/svm/svm.h | 11 ++++++++++- >> 4 files changed, 14 insertions(+), 1 deletion(-) >> >> diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h >> index e2fac21471f5..a04346068c60 100644 >> --- a/arch/x86/include/asm/svm.h >> +++ b/arch/x86/include/asm/svm.h >> @@ -289,6 +289,7 @@ static_assert((X2AVIC_MAX_PHYSICAL_ID & AVIC_PHYSICAL_MAX_INDEX_MASK) == X2AVIC_ >> #define SVM_SEV_FEAT_RESTRICTED_INJECTION BIT(3) >> #define SVM_SEV_FEAT_ALTERNATE_INJECTION BIT(4) >> #define SVM_SEV_FEAT_DEBUG_SWAP BIT(5) >> +#define SVM_SEV_FEAT_SECURE_TSC BIT(9) >> >> #define SVM_SEV_FEAT_INT_INJ_MODES \ >> (SVM_SEV_FEAT_RESTRICTED_INJECTION | \ >> diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c >> index 74525651770a..7875bb14a2b1 100644 >> --- a/arch/x86/kvm/svm/sev.c >> +++ b/arch/x86/kvm/svm/sev.c >> @@ -843,6 +843,8 @@ static int sev_es_sync_vmsa(struct vcpu_svm *svm) >> save->dr6 = svm->vcpu.arch.dr6; >> >> save->sev_features = sev->vmsa_features; >> + if (snp_secure_tsc_enabled(vcpu->kvm)) >> + set_msr_interception(&svm->vcpu, svm->msrpm, MSR_AMD64_GUEST_TSC_FREQ, 1, 1); > > Seems odd to clear the intercept in the sev_es_sync_vmsa() routine. Why > not in the sev_es_init_vmcb() routine where this is normally done? No particular reason that I can remember, I will move this to sev_es_init_vmcb(). Regards, Nikunj